CD00191174 Datasheet, PDF (17/112 Pages) STMicroelectronics – High-density access line, ARM-based 32-bit MCU

STM32F101xC, STM32F101xD, STM32F101xE
Description
2.3.11
2.3.12
2.3.13
2.3.14
Power supply schemes
● V_DD = 2.0 to 3.6 V: external power supply for I/Os and the internal regulator.
Provided externally through V_DD pins.
● V_SSA, V_DDA = 2.0 to 3.6 V: external analog power supplies for ADC, DAC, Reset blocks,
RCs and PLL (minimum voltage to be applied to V_DDA is 2.4 V when the ADC or DAC is
used). V_DDA and V_SSA must be connected to V_DD and V_SS, respectively.
● V_BAT = 1.8 to 3.6 V: power supply for RTC, external clock 32 kHz oscillator and backup
registers (through power switch) when V_DD is not present.
For more details on how to connect power pins, refer to Figure 9: Power supply scheme.
Power supply supervisor
The device has an integrated power-on reset (POR)/power-down reset (PDR) circuitry. It is
always active, and ensures proper operation starting from/down to 2 V. The device remains
in reset mode when V_DD is below a specified threshold, V_POR/PDR, without the need for an
external reset circuit.
The device features an embedded programmable voltage detector (PVD) that monitors the
V_DD/V_DDA power supply and compares it to the V_PVD threshold. An interrupt can be
generated when V_DD/V_DDA drops below the V_PVD threshold and/or when V_DD/V_DDA is higher
than the V_PVD threshold. The interrupt service routine can then generate a warning
message and/or put the MCU into a safe state. The PVD is enabled by software. Refer to
Table 12: Embedded reset and power control block characteristics for the values of
V_POR/PDR and V_PVD.
Voltage regulator
The regulator has three operation modes: main (MR), low power (LPR) and power down.
● MR is used in the nominal regulation mode (Run)
● LPR is used in the Stop modes.
● Power down is used in Standby mode: the regulator output is in high impedance: the
kernel circuitry is powered down, inducing zero consumption (but the contents of the
registers and SRAM are lost)
This regulator is always enabled after reset. It is disabled in Standby mode.
Low-power modes
The STM32F101xC, STM32F101xD and STM32F101xE access line supports three low-
power modes to achieve the best compromise between low power consumption, short
startup time and available wakeup sources:
● Sleep mode
In Sleep mode, only the CPU is stopped. All peripherals continue to operate and can
wake up the CPU when an interrupt/event occurs.
● Stop mode
Stop mode achieves the lowest power consumption while retaining the content of
SRAM and registers. All clocks in the 1.8 V domain are stopped, the PLL, the HSI RC
and the HSE crystal oscillators are disabled. The voltage regulator can also be put
either in normal or in low power mode.
Doc ID 14610 Rev 8
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