CD00237391 Datasheet, PDF (88/177 Pages) STMicroelectronics – ARM-based 32-bit MCU, 150DMIPs, up to 1 MB Flash/128+4KB RAM

Electrical characteristics
STM32F20xxx
Table 33. PLLI2S (audio PLL) characteristics (continued)
Symbol
Parameter
Conditions
Min Typ Max
Jitter⁽³⁾
Master I2S clock jitter
Cycle to cycle at
RMS
-
90
-
12.288 MHz on
48KHz period,
N=432, R=5
peak
to
-
peak
±280
-
Average frequency of
12.288 MHz
N=432, R=5
on 1000 samples
-
90
-
WS I2S clock jitter
Cycle to cycle at 48 KHz
on 1000 samples
-
400
-
I_{DD(PLLI2S)(4)}
PLLI2S power consumption on
V_DD
I_{DDA(PLLI2S)(4)}
PLLI2S power consumption on
V_DDA
VCO freq = 192 MHz
VCO freq = 432 MHz
VCO freq = 192 MHz
VCO freq = 432 MHz
0.15
0.40
-
0.45
0.75
0.30
0.40
-
0.55
0.85
1. Take care of using the appropriate division factor M to have the specified PLL input clock values.
2. Guaranteed by design, not tested in production.
3. Value given with main PLL running.
4. Based on characterization, not tested in production.
Unit
ps
ps
ps
mA
mA
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Doc ID 15818 Rev 9