CD00237391 Datasheet, PDF (19/177 Pages) STMicroelectronics – ARM-based 32-bit MCU, 150DMIPs, up to 1 MB Flash/128+4KB RAM

STM32F20xxx
Description
2.2.5
CRC (cyclic redundancy check) calculation unit
The CRC (cyclic redundancy check) calculation unit is used to get a CRC code from a 32-bit
data word and a fixed generator polynomial.
Among other applications, CRC-based techniques are used to verify data transmission or
storage integrity. In the scope of the EN/IEC 60335-1 standard, they offer a means of
verifying the Flash memory integrity. The CRC calculation unit helps compute a software
signature during runtime, to be compared with a reference signature generated at link-time
and stored at a given memory location.
2.2.6
Embedded SRAM
All STM32F20x products embed:
● Up to 128 Kbytes of system SRAM accessed (read/write) at CPU clock speed with 0
wait states
● 4 Kbytes of backup SRAM.
The content of this area is protected against possible unwanted write accesses, and is
retained in Standby or VBAT mode.
2.2.7
Multi-AHB bus matrix
The 32-bit multi-AHB bus matrix interconnects all the masters (CPU, DMAs, Ethernet, USB
HS) and the slaves (Flash memory, RAM, FSMC, AHB and APB peripherals) and ensures a
seamless and efficient operation even when several high-speed peripherals work
simultaneously.
Figure 5. Multi-AHB matrix
ARM
Cortex-M3
GP
DMA1
GP
MAC _{USB OTG}
DMA2 Ethernet _HS
S0 S1 S2
S3 S4 S5 S6 S7
M0 ^ICODE
M1 ^DCODE
M2
M3
M4
M5
M6
Bus matrix-S
Flash
memory
SRAM
112 Kbyte
SRAM
16 Kbyte
AHB1
periph
AHB2
periph
FSMC
Static MemCtl
APB1
APB2
ai15963c
Doc ID 15818 Rev 9
19/177