CD00237391 Datasheet, PDF (169/177 Pages) STMicroelectronics – ARM-based 32-bit MCU, 150DMIPs, up to 1 MB Flash/128+4KB RAM

STM32F20xxx
Revision history
Table 94. Document revision history (continued)
Date
Revision
Changes
22-Apr-2011
Changed datasheet status to “Full Datasheet”.
Introduced concept of SRAM1 and SRAM2.
LQFP176 package now in production and offered only for 256 Kbyte
and 1 Mbyte devices. Availability of WLCSP64+2 package limited to
512 Kbyte and 1 Mbyte devices.
Updated Figure 3: Compatible board design between STM32F10xx
and STM32F2xx for LQFP144 package and Figure 2: Compatible
board design between STM32F10xx and STM32F2xx for LQFP100
package.
Added camera interface for STM32F207Vx devices in Table 2:
STM32F205xx features and peripheral counts.
Removed 16 MHz internal RC oscillator accuracy in Section 2.2.12:
Clocks and startup.
Updated Section 2.2.16: Voltage regulator.
Modified I²S sampling frequency range in Section 2.2.12: Clocks and
startup, Section 2.2.24: Inter-integrated sound (I2S), and
Section 2.2.30: Audio PLL (PLLI2S).
Updated Section 2.2.17: Real-time clock (RTC), backup SRAM and
backup registers and description of TIM2 and TIM5 in Section :
General-purpose timers (TIMx).
Modified maximum baud rate (oversampling by 16) for USART1 in
Table 5: USART feature comparison.
Updated note related to RFU pin below Figure 10: STM32F20x
LQFP100 pinout, Figure 11: STM32F20x LQFP144 pinout, Figure 12:
STM32F20x LQFP176 pinout, Figure 13: STM32F20x UFBGA176
6
ballout, and Table 6: STM32F20x pin and ball definitions.
In Table 6: STM32F20x pin and ball definitions,:changed I2S2_CK and
I2S3_CK to I2S2_SCK and I2S3_SCK, respectively; added PA15 and
TT (3.6 V tolerant I/O).
Added RTC_50Hz as PB15 alternate function in Table 6: STM32F20x
pin and ball definitions and Table 8: Alternate function mapping.
Removed ETH _RMII_TX_CLK for PC3/AF11 in Table 8: Alternate
function mapping.
Updated Table 9: Voltage characteristics and Table 10: Current
characteristics.
T_STG updated to –65 to +150 in Table 11: Thermal characteristics.
Added CEXT, ESL, and ESR in Table 12: General operating conditions
as well as Section 5.3.2: VCAP1/VCAP2 external capacitor.
Modified Note 4 in Table 13: Limitations depending on the operating
power supply range.
Updated Table 15: Operating conditions at power-up / power-down
(regulator ON), and Table 16: Operating conditions at power-up /
power-down (regulator OFF).
Added OSC_OUT pin in Figure 15: Pin loading conditions. and
Figure 16: Pin input voltage.
Updated Figure 17: Power supply scheme to add IRROFF and
REGOFF pins and modified notes.
Updated V_PVD, V_BOR1, V_BOR2, V_BOR3, T_RSTTEMPO typical value, and
I_RUSH, added E_RUSH and Note 3 in Table 17: Embedded reset and
power control block characteristics.
Doc ID 15818 Rev 9
169/177