CD00253742 Datasheet, PDF (87/120 Pages) STMicroelectronics – XL-density performance line ARM-based 32-bit MCU

STM32F103xF, STM32F103xG
Electrical characteristics
Output voltage levels
Unless otherwise specified, the parameters given in Table 50 are derived from tests
performed under ambient temperature and V_DD supply voltage conditions summarized in
Table 10. All I/Os are CMOS and TTL compliant.
Table 50. Output voltage characteristics
Symbol
Parameter
Conditions
Min
Max Unit
V_OL(1)
Output low level voltage for an I/O pin
when 8 pins are sunk at same time
TTL port⁽³⁾
-
0.4
V_OH(2)
Output high level voltage for an I/O pin
when 8 pins are sourced at same time
I_IO = +8 mA
2.7 V < V_DD < 3.6 V _VDD–0.4
-
V
V_OL ⁽¹⁾
Output low level voltage for an I/O pin
when 8 pins are sunk at same time
CMOS port⁽³⁾
-
I_IO =+ 8mA
V_OH ⁽²⁾
Output high level voltage for an I/O pin
when 8 pins are sourced at same time
2.7 V < V_DD < 3.6 V
2.4
0.4
V
-
V_OL(1)(4)
Output low level voltage for an I/O pin
when 8 pins are sunk at same time
I_IO = +20 mA
-
1.3
V_OH(2)(4)
Output high level voltage for an I/O pin
when 8 pins are sourced at same time
2.7 V < V_DD < 3.6 V
V_DD–1.3
-
V
V_OL(1)(4)
Output low level voltage for an I/O pin
when 8 pins are sunk at same time
I_IO = +6 mA
-
0.4
V_OH(2)(4)
Output high level voltage for an I/O pin
when 8 pins are sourced at same time
2 V < V_DD < 2.7 V _VDD–0.4
-
V
1. The I_IO current sunk by the device must always respect the absolute maximum rating specified in Table 8
and the sum of I_IO (I/O ports and control pins) must not exceed I_VSS.
2. The I_IO current sourced by the device must always respect the absolute maximum rating specified in
Table 8 and the sum of I_IO (I/O ports and control pins) must not exceed I_VDD.
3. TTL and CMOS outputs are compatible with JEDEC standards JESD36 and JESD52.
4. Based on characterization data, not tested in production.
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