CD00253742 Datasheet, PDF (107/120 Pages) STMicroelectronics – XL-density performance line ARM-based 32-bit MCU

STM32F103xF, STM32F103xG
Electrical characteristics
Table 66. DAC characteristics (continued)
Symbol
Parameter
Min Typ
Integral non linearity
(difference between
-
-
INL⁽²⁾
measured value at Code i
and the value at Code i on a
line drawn between Code 0 ^-
-
and last Code 1023)
Offset error
-
-
(difference between
Offset⁽²⁾ measured value at Code
-
-
(0x800) and the ideal value =
V_REF+/2)
-
-
Gain
error⁽²⁾
Gain error
-
-
Settling time (full scale: for a
10-bit input code transition
t_SETTLING(2)
between the lowest and the
highest input codes when
-
3
DAC_OUT reaches final
value ±1LSB
Max frequency for a correct
Update
rate⁽²⁾
DAC_OUT change when
small variation in the input
-
-
code (from code i to i+1LSB)
Wakeup time from off state
t_WAKEUP(2) (Setting the ENx bit in the
- 6.5
DAC Control register)
Power supply rejection ratio
PSRR+ ⁽¹⁾ (to V_DDA) (static DC
- –67
measurement
1. Guaranteed by design, not tested in production.
2. Preliminary values.
Max
±1
±4
±10
±3
±12
±0.5
Unit
Comments
LSB
Given for the DAC in 10-bit
configuration
LSB
Given for the DAC in 12-bit
configuration
mV
Given for the DAC in 12-bit
configuration
LSB
Given for the DAC in 10-bit at V_REF+
= 3.6 V
LSB
Given for the DAC in 12-bit at V_REF+
= 3.6 V
%
Given for the DAC in 12bit
configuration
4
µs C_LOAD ≤ 50 pF, R_LOAD ≥ 5 kΩ
1
MS/s C_LOAD ≤ 50 pF, R_LOAD ≥ 5 kΩ
C_LOAD ≤ 50 pF, R_LOAD ≥ 5 kΩ
10
µs input code between lowest and
highest possible ones.
–40
dB No R_LOAD, C_LOAD = 50 pF
Figure 59. 12-bit buffered /non-buffered DAC
Buffered/Non-buffered DAC
Buffer(1)
12-bit
digital to
analog
converter
DACx_OUT
R _LOAD
C _LOAD
ai17157
1. The DAC integrates an output buffer that can be used to reduce the output impedance and to drive external loads directly
without the use of an external operational amplifier. The buffer can be bypassed by configuring the BOFFx bit in the
DAC_CR register.
Doc ID 16554 Rev 3
107/120