UPSD3212A Datasheet, PDF (142/163 Pages) STMicroelectronics – Flash Programmable System Devices with 8032 MCU with USB and Programmable Logic

uPSD3212A, uPSD3212C, uPSD3212CV
Figure 72. External Data Memory READ Cycle
ALE
PSEN
RD
PORT 0
PORT 2
tLHLL
tWHLH
tLLDV
tLLWL
tRLRH
tAVLL
tLLAX2
A0-A7 from
RI or DPL
tAVWL
tAVDV
tRLDV
tRLAZ
tRHDZ
DATA IN
tRHDX
A0-A7 from PCL
INSTR IN
P2.0 to P2.3 or A8-A11 from DPH
A8-A11 from PCH
AI07088
Table 118. External Clock Drive (with the 5V MCU Module)
Symbol
Parameter⁽¹⁾
40MHz Oscillator
Min
Max
Variable Oscillator
1/t_CLCL = 24 to 40MHz
Unit
Min
Max
t_RLRH Oscillator period
25
41.7
ns
t_WLWH High time
10
t_CLCL – t_CLCX ns
t_LLAX2 Low time
10
t_CLCL – t_CLCX ns
t_RHDX Rise time
10
ns
t_RHDX
Fall time
10
ns
Note: 1. Conditions (in addition to those in Table 109., page 133, V_CC = 4.5 to 5.5V): V_SS = 0V; C_L for Port 0, ALE and PSEN output is 100pF;
C_L for other outputs is 80pF
Table 119. External Clock Drive (with the 3V MCU Module)
Symbol
Parameter⁽¹⁾
24MHz Oscillator
Min
Max
Variable Oscillator
1/t_CLCL = 8 to 24MHz
Unit
Min
Max
t_RLRH Oscillator period
41.7
125
ns
t_WLWH High time
12
t_CLCL – t_CLCX ns
t_LLAX2 Low time
12
t_CLCL – t_CLCX ns
t_RHDX
Rise time
12
ns
t_RHDX
Fall time
12
ns
Note: 1. Conditions (in addition to those in Table 110., page 133, V_CC = 3.0 to 3.6V): V_SS = 0V; C_L for Port 0, ALE and PSEN output is 100pF,
for 5V devices, and 50pF for 3V devices; C_L for other outputs is 80pF, for 5V devices, and 50pF for 3V devices)
142/163