UPSD3212A Datasheet, PDF (140/163 Pages) STMicroelectronics – Flash Programmable System Devices with 8032 MCU with USB and Programmable Logic

uPSD3212A, uPSD3212C, uPSD3212CV
Figure 71. External Program Memory READ Cycle
tLHLL
tLLPL
ALE
PSEN
PORT 0
PORT 2
tAVLL
tPLPH
tLLIV
tPLIV
tLLAX
A0-A7
tAZPL
tAVIV
A8-A11
INSTR
IN
tPXAV
tPXIZ
tPXIX
A0-A7
A8-A11
AI06848
Table 116. External Program Memory AC Characteristics (with the 5V MCU Module)
Symbol
Parameter⁽¹⁾
40MHz Oscillator
Min
Max
Variable Oscillator
1/t_CLCL = 24 to 40MHz
Unit
Min
Max
t_LHLL
ALE pulse width
35
2t_CLCL – 15
ns
t_AVLL
Address set up to ALE
10
t_CLCL – 15
ns
t_LLAX
Address hold after ALE
10
t_CLCL – 15
ns
t_LLIV
ALE Low to valid instruction in
55
4t_CLCL – 45 ns
t_LLPL
ALE to PSEN
10
t_CLCL – 15
ns
t_PLPH
PSEN pulse width
60
3t_CLCL – 15
ns
t_PLIV
PSEN to valid instruction in
30
3t_CLCL – 45 ns
t_PXIX
Input instruction hold after PSEN
0
0
ns
t_PXIZ(2) Input instruction float after PSEN
15
t_CLCL – 10 ns
t_PXAV(2) Address valid after PSEN
20
t_CLCL – 5
ns
t_AVIV
Address to valid instruction in
70
5t_CLCL – 55 ns
t_AZPL
Address float to PSEN
–5
–5
ns
Note: 1. Conditions (in addition to those in Table 109., page 133, V_CC = 4.5 to 5.5V): V_SS = 0V; C_L for Port 0, ALE and PSEN output is 100pF;
C_L for other outputs is 80pF
2. Interfacing the uPSD321x Devices to devices with float times up to 20ns is permissible. This limited bus contention does not cause
any damage to Port 0 drivers.
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