UPSD3212A Datasheet, PDF (111/163 Pages) STMicroelectronics – Flash Programmable System Devices with 8032 MCU with USB and Programmable Logic

uPSD3212A, uPSD3212C, uPSD3212CV
Product Term Allocator
The CPLD has a Product Term Allocator. PSDsoft
uses the Product Term Allocator to borrow and
place product terms from one macrocell to anoth-
er. The following list summarizes how product
terms are allocated:
– McellAB0-McellAB7 all have three native
product terms and may borrow up to six more
– McellBC0-McellBC3 all have four native
product terms and may borrow up to five more
– McellBC4-McellBC7 all have four native
product terms and may borrow up to six more.
Each macrocell may only borrow product terms
from certain other macrocells. Product terms al-
ready in use by one macrocell are not available for
another macrocell.
If an equation requires more product terms than
are available to it, then “external” product terms
are required, which consume other Output Macro-
cells (OMC). If external product terms are used,
extra delay is added for the equation that required
the extra product terms.
This is called product term expansion. PSDsoft
Express performs this expansion as needed.
Loading and Reading the Output Macrocells
(OMC). The Output Macrocells (OMC) block oc-
cupies a memory location in the MCU address
space, as defined by the CSIOP block (see I/O
PORTS (PSD MODULE), page 113). The flip-
flops in each of the 16 Output Macrocells (OMC)
can be loaded from the data bus by a MCU. Load-
ing the Output Macrocells (OMC) with data from
the MCU takes priority over internal functions. As
such, the preset, clear, and clock inputs to the flip-
flop can be overridden by the MCU. The ability to
load the flip-flops and read them back is useful in
such applications as loadable counters and shift
registers, mailboxes, and handshaking protocols.
Data can be loaded to the Output Macrocells
(OMC) on the trailing edge of WRITE Strobe (WR,
edge loading) or during the time that WRITE
Strobe (WR) is active (level loading). The method
of loading is specified in PSDsoft Express Config-
uration.
Figure 57. CPLD Output Macrocell
MASK
REG.
MACROCELL CS
RD
MCU DATA BUS
D [ 7:0]
WR
PT
ALLOCATOR
ENABLE (.OE)
PRESET(.PR)
PT
PT
PT
PT CLK
CLKIN
POLARITY
SELECT
CLEAR (.RE)
MUX
COMB/REG
SELECT
DIN PR
LD
Q
IN
MUX
CLR
PROGRAMMABLE
FF (D/T/JK /SR)
DIRECTION
REGISTER
MACROCELL
ALLOCATOR
PORT
DRIVER
I/O PIN
FEEDBACK (.FB)
PORT INPUT
INPUT
MACROCELL
AI06617
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