91C94 Datasheet, PDF (99/120 Pages) SMSC Corporation – ISA/PCMCIA SINGLE CHIP ETHERNET CONTROLLER WITH RAM

A0-9, A15
n REG
t 51
t 47
valid
t 52
t 49
t 48
t 50
nCE1, nCE2
nIOWR
t 20
t 54
t 55
D 0- 15
valid
Parameter
t47
nREG Low Setup to Control Active
t48
nCE1, nCE2 Setup to Control Active
t49
nREG Hol d aft er Control Inactive
t50
nCE1,nCE2 Hol d after Control Inactive
t51
Address Setup to Control A c tive
t52
Address Hol d after Control Inactive
t20
Cycl e Tim e (No Wait States)
t54
Wri te Data Setup to nIOWR Rising
t55
Write Data Hold after nIOWR Rising
mi n
typ
max
units
5
ns
5
ns
0
ns
15
ns
25
ns
15
ns
185
ns
30
ns
9
ns
FIGURE 24 - CONSECUTIVE PCMCIA WRITE CYCLES
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