91C94 Datasheet, PDF (6/120 Pages) SMSC Corporation – ISA/PCMCIA SINGLE CHIP ETHERNET CONTROLLER WITH RAM

The LAN91C94 offers:
High integration:
Single chip adapter including:
Packet RAM
ISA bus interface
PCMCIA interface
EEPROM interface
Encoder decoder with AUI interface
10BASE-T transceiver
High performance:
Chained ("Back-to-back") packet handling
with no CPU intervention:
Queues transmit packets
Queues receive packets
Stores results in memory along with
packet
Queues interrupts
Optional single interrupt upon
completion of transmit chain.
Fast block move operation for load/unload:
CPU sees packet bytes as if stored
contiguously.
Handles 16 bit transfers regardless of
address alignment.
Access to packet through fixed window.
Fast bus interface:
Compatible with ISA type and faster buses.
Flexibility:
Flexible packet and header processing:
Can be set to Simultasking - Early
Receive and Transmit modes.
Can access any byte in the packet.
Can immediately remove undesired
packets from queue.
Can move packets from receive to
transmit queue.
Can alter receive processing order
without copying data.
Can discard or enqueue again a failed
transmission.
Resource allocation:
Memory dynamically allocated for transmit
and receive.
Can automatically release memory on
successful transmission.
Configuration:
ISA:
Uses non-volatile jumperless setup via
serial EEPROM.
PCMCIA:
Uses ROM or Flash ROM for attribute
memory storage and optional serial
EEPROM for IEEE address storage.
PCMCIA I/O ignores address lines A4-
A15 and relies on the PCMCIA host,
decoding for the slot.
nROM/nPCMCIA, on LAN91C94, is left
open with a pullup for ISA mode. This
pin is sampled at the end of RESET. If
found low, the LAN91C94 is configured
for PCMCIA mode.
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