91C94 Datasheet, PDF (97/120 Pages) SMSC Corporation – ISA/PCMCIA SINGLE CHIP ETHERNET CONTROLLER WITH RAM

A0-9,A15
nREG
nCE1,nCE2
nIORD
D0-15
nINPACK
t51
valid
t48
t49
t52
t20
t50
t53
t47
va lid
t46
t46
Parameter
t46 nIO RD Del ay to INPACK
t47 nREG Low to Control A ctive
t48 nCE1, nCE2 Setup to Control A ct ive
t20 Cycle Time (No Wai t States)
t49 nREG Hold after Control A ctive
t50 nCE1,nCE2 Hold after Control Inactive
t51 Address Setup to Control A ctive
t52 Address Hold after Control Inactive
t53 nIO RD Active to Data Valid
min
typ
max
units
0
35
ns
5
ns
5
ns
185
ns
0
ns
15
ns
25
ns
15
ns
0
40
ns
FIGURE 22 - PCMCIA CONSECUTIVE READ CYCLES
97