91C94 Datasheet, PDF (115/120 Pages) SMSC Corporation – ISA/PCMCIA SINGLE CHIP ETHERNET CONTROLLER WITH RAM

ADDRESS
POINTER
REGISTER
nIOWR
t44
nIO RD
DATA
REGISTER
IOCHRDY /
nWAIT (Z)
Parameter
m in
typ
max
un its
t44 Pointer Register Reloaded to a Word of Data 2 * t20
ns
Prefet ched into Data Register
Not e: If t44 is not met, IOCHRDY wil l be negated for the required time. This parameter can be ignored if
IOCHRDY is connected to the system .
FIGURE 42 – MEMORY READ TIMING
ADDRES S
DATA
REGISTER
nIOWR
t45
PO INTER
REGISTER
Parameter
t45 Last Access to Data Register to Pointer
Reloaded
min
typ
2 * t20
max
units
ns
FIGURE 43 – MEMORY WRITE TIMING
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