91C94 Datasheet, PDF (63/120 Pages) SMSC Corporation – ISA/PCMCIA SINGLE CHIP ETHERNET CONTROLLER WITH RAM

I/O SPACE - BANK3
OFFSET
8
NAME
MANAGEMENT INTERFACE
TYPE
READ/WRITE
SYMBOL
MGMT
This register contains status bits and control bits for management of different transceivers modules.
Some of the pins are shared with the serial EEPROM interface. Management is software controlled,
and does not use the serial EEPROM and the transceiver management functions at the same time.
HIGH
BYTE
nXNDEC
IOS2
IOS1
IOS0
0
0
1
1
LOW
BYTE
MDOE
MCLK Reserved
MD0
0
0
1
1
0
0
0
0
nXNDEC - Read only bit reflecting the status of
the nXENDEC pin.
IOS0-2 - Read only bits reflecting the status of
the IOS0-2 pins.
MDO - The value of this bit drives the EEDO pin
when MDOE=1.
MDCLK - The value of this bit drives the EESK
pin when MDOE=1.
MDOE - When this bit is high pins EEDO EECS
and EESK will be used for transceiver
management functions, otherwise the pins
assume the EEPROM values.
EEDO
EESK
EECS
MDOE=0
Serial EEPROM Data Out
Serial EEPROM Clock
Serial EEPROM Chip Select
MDOE=1
Bit MDO
Bit MCLK
0
63