91C94 Datasheet, PDF (98/120 Pages) SMSC Corporation – ISA/PCMCIA SINGLE CHIP ETHERNET CONTROLLER WITH RAM

A0-15
AEN, nSBHE
nIOCS16
nIOWR
D0-15
VALID ADDRESS
t15
t4
t3
t8
t7
VALID DATA IN
VALID ADDRESS
t20
VALID DATA
Parameter
min
typ
max
uni ts
t3
Address, nSBHE, AEN Setup to Control Acti ve 25
t4
Address, nSBHE, AEN Hol d after Control
20
Inacti ve
t7
Data Setup to nIOWR Rising
30
t8
Data Hold after nIOWR Rising
9
t15
A4-A15, AEN Low, B ALE High to nIOCS16
Low
t20
Cycle time*
185
ns
ns
ns
ns
25
ns
ns
BALE T ied High
IOCHRDY not used - t20 has to be met
*Note: The cycle ti me i s defined onl y for consecuti ve accesses to the Data Register. These values assume
that IOCHRDY is not used.
FIGURE 23 - ISA CONSECUTIVE WRITE CYCLES
98