LAN9115_05 Datasheet, PDF (129/131 Pages) SMSC Corporation – Highly Efficient Single- Chip 10/100 Non-PCI Ethernet Controller

Highly Efficient Single-Chip 10/100 Non-PCI Ethernet Controller
Datasheet
Table 7.4 100BASE-TX Tranceiver Characteristics
PARAMETER
Peak Differential Output Voltage
High
Peak Differential Output Voltage
Low
Signal Amplitude Symmetry
Signal Rise & Fall Time
Rise & Fall Time Symmetry
Duty Cycle Distortion
Overshoot & Undershoot
Jitter
SYMBOL MIN
V_PPH
950
V_PPL
-950
V_SS
98
T_RF
3.0
T_RFS
-
D_CD
35
V_OS
-
TYP MAX UNITS
-
1050
mVpk
-
-1050 mVpk
-
102
%
-
5.0
nS
-
0.5
nS
50
65
%
-
5
%
1.4
nS
NOTES
Note 7.4
Note 7.4
Note 7.4
Note 7.4
Note 7.4
Note 7.5
Note 7.6
Note 7.4 Measured at the line side of the transformer, line replaced by 100Ω (+/- 1%) resistor.
Note 7.5 Offset from16 nS pulse width at 50% of pulse peak
Note 7.6 Measured differentially.
Table 7.5 10BASE-T Tranceiver Characteristics
PARAMETER
Transmitter Peak Differential
Output Voltage
Receiver Differential Squelch
Threshold
SYMBOL MIN
V_OUT
2.2
V_DS
300
TYP MAX UNITS
2.5
2.8
V
420
585
mV
NOTES
Note 7.7
Note 7.7 Measured at the line side of the transformer, line replaced by 100Ω (+/- 1%) resistor.
7.5
Clock Circuit
The LAN9115 can accept either a 25MHz crystal (preferred) or a 25 MHz clock oscillator (±50 PPM)
input. The LAN9115 shares the 25MHz clock oscillator input (CLKIN) with the crystal input
XTAL1/CLKIN (pin 6).
The Input Clock Duty Cycle is 40% minimum, 50% typical and 60% maximum.
It is recommended that a crystal utilizing matching parallel load capacitors be used for the LAN9115
crystal input/output signals (XTAL1, XTAL2). See Table 7.6, "LAN9115 Crystal Specifications" for crystal
specifications.
SMSC LAN9115
129
DATASHEET
Revision 1.1 (05-17-05)