SI5317 Datasheet, PDF (49/50 Pages) Silicon Laboratories – Pin-Controlled 1_710 MHz Jitter Cleaning Clock

DOCUMENT CHANGE LIST
Revision 0.1 to Revision 0.15
 Updated corresponding sections and pinouts to add
CKOUT2, INC/DEC, and DBL2_BY functionality.
 Updated functional block diagram on page 1.
 Updated Table 2 IDD (DD is subscript).
 Added Differential Rise/Fall Time spec to Table 2.
 Updated pin assignment symbol and pin description
on page 1 and in section 9 to add CKOUT2,
INC/DEC, and DBL2_BY.
 Added section 3.6. "PLL Bypass Mode”.
 Updated section 8 diagram to add CKOUT2 and
DBL2_BY.
 Added additional CMOS Termination with
attenuation figure.
 Corrected pin name assignment (pin28) diagram on
page 1 and section 9, page 35 to match pin
description name.
 Updated all the frequency plans in Table 8 to provide
coverage over the entire frequency range.
Material
Material
Si5317
Preliminary Rev. 0.15
49