SI5317 Datasheet, PDF (13/50 Pages) Silicon Laboratories – Pin-Controlled 1_710 MHz Jitter Cleaning Clock

Si5317
Table 6. Thermal Characteristics
(V_DD = 1.8 ±5%, 2.5 ±10%, or 3.3 V ±10%, T_A = –40 to 85 ºC)
Parameter
Thermal Resistance
Junction to Ambient
Thermal Resistance
Junction to Case
Symbol
_JA
_JC
Test Condition
Still Air
Min
Typ
Max Unit
—
32
—
ºC/W
—
14
—
ºC/W
Table 7. Absolute Maximum Ratings
Parameter
Symbol
Value
Unit
DC Supply Voltage
LVCMOS Input Voltage
Operating Junction Temperature
Storage Temperature Range
ESD HBM Tolerance (100 pF, 1.5 kΩ); All pins except
CKIN+/CKIN–
V_DD
–0.5 to 3.63
V
V_DIG
–0.3 to (V_DD + 0.3)
V
T_JCT
–55 to 150
C
T_STG
–55 to 150
C
2
kV
ESD MM Tolerance; All pins except CKIN+/CKIN–
ESD HBM Tolerance (100 pF, 1.5 kΩ); CKIN+/CKIN–
200
V
700
V
ESD MM Tolerance; CKIN+/CKIN–
150
V
Latch-Up Tolerance
JESD78 Compliant
Note: Permanent device damage may occur if the Absolute Maximum Ratings are exceeded. Functional operation should be
restricted to the conditions as specified in the operation sections of this data sheet. Exposure to absolute maximum
rating conditions for extended periods of time may affect device reliability.
Preliminary Rev. 0.15
13