SI5317 Datasheet, PDF (35/50 Pages) Silicon Laboratories – Pin-Controlled 1_710 MHz Jitter Cleaning Clock

Si5317
6. Power Supply Filtering
This device incorporates an on-chip voltage regulator to power the device from supply voltages of 1.8, 2.5, or 3.3 V.
Internal core circuitry is driven from the output of this regulator while I/O circuitry uses the external supply voltage
directly. Table 4, “AC Characteristics” gives the sensitivity of the on-chip oscillator to changes in the supply voltage.
The center ground pad under the device must be electrically and thermally connected to the ground plane. See
Figure 26, “Ground Pad Recommended Layout,” on page 45.
System
Power
Supply
(1.8, 2.5, or
3.3 V)
Ferrite
Bead
0.1 uF
C₁ – C₃
1.0 uF
C₄
V_DD
GND &
GND Pad
Si5317
Figure 20. Typical Power Supply Bypass Network
Power Supply Noise to Output Transfer Function
-60
-65
-70
-75
-80
-85
-90
-95
-100
-105
1
10
100
1000
Frequency of Power Supply Noise (kHz)
Figure 21. Fin = Fout = 155 MHz with 120 Hz Loop Bandwidth, 100 mV, pk-pk Supply Noise
Preliminary Rev. 0.15
35