SI5317 Datasheet, PDF(29/50 Page) Silicon Laboratories – Pin-Controlled 1

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SI5317 Datasheet, PDF (29/50 Pages) Silicon Laboratories – Pin-Controlled 1_710 MHz Jitter Cleaning Clock

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SFOUT[1:0] = ML (Output disable)

Si5317

Output from

DSPLL

100 ï

CKOUT

Figure 14. Disable CKOUT Structure

The SFOUT [1:0] pins can also be used to disable both outputs. Disabling the output puts the CKOUT+ and

CKOUTâ pins in a high-impedance state relative to VDD (common mode tri-state) while the two outputs remain

connected to each other through a 200 ï on-chip resistance (differential impedance of 200 ï). The maximum

amount of internal circuitry is powered down, minimizing power consumption and noise generation (see Figure 14).

Recovery from the disable mode requires additional time as specified in Table 4, âAC Characteristicsâ.

Preliminary Rev. 0.15

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