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SI5317 Datasheet, PDF (39/50 Pages) Silicon Laboratories – Pin-Controlled 1_710 MHz Jitter Cleaning Clock
Pin #
7
6
8,31
11
15
14
16
17
18
19
20
Si5317
Pin Name
XB
XA
GND
RATE0
RATE1
DBL2_BY
CKIN+
CKIN–
LOL
DEC
INC
Table 15. Si5317 Pin Descriptions (Continued)
I/O
I
GND
I
I
I
O
I
I
Signal Level
Analog
Supply
3-Level
3-Level
Multi
LVCMOS
LVCMOS
LVCMOS
Description
External Crystal or Reference Clock.
External crystal should be connected to these pins to use
internal oscillator-based reference. Crystal or reference clock
selection is set by the XTAL/CLOCK pin.
Ground.
Must be connected to system ground. Minimize the ground
path impedance for optimal performance of this device.
External Crystal or Reference Clock Rate.
Note: L setting corresponds to ground. M setting corresponds to
VDD/2. H setting corresponds to VDD. Some designs may
require an external resistor voltage divider when driven by
an active device that will tri-state. See Table 14 for settings.
Output 2 Disable/Bypass Mode Control.
Controls enable of CKOUT2 divider/output buffer path and
PLL bypass mode.
L = CKOUT2 enabled
M = CKOUT2 disabled
H = Bypass mode with CKOUT2 enabled
This pin has a weak pull-up and weak pull-down and defaults
to M.
Some designs may require an external resistor voltage
divider when driven by an active device that will tri-state.
Clock Input.
Differential input clock. This input can also be driven with a
single-ended signal. Input frequency selected from Table 9
on page 22.
PLL Loss of Lock Indicator.
This pin functions as the active high PLL loss of lock indica-
tor.
0 = PLL locked
1 = PLL unlocked
Skew Decrement.
This edge-triggered pin decreases the input to output device
skew. There is no limit on the range of skew adjustment by
this method. Detailed operations and timing characteristics
for this pin are found in Section 3.2, Table 8.
This pin has a weak pull-down.
Skew Increment.
This edge-triggered pin increases the input to output device
skew. There is no limit on the range of skew adjustment by
this method. Detailed operations and timing characteristics
for this pin are found in Section 3.2, Table 8.
This pin has a weak pull-down.
Preliminary Rev. 0.15
39