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SI5317 Datasheet, PDF (32/50 Pages) Silicon Laboratories – Pin-Controlled 1_710 MHz Jitter Cleaning Clock
Si5317
RATE[1:0]
HH
HM
HL
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Table 14. XA/XB Reference Sources and Frequencies
Type
Reserved
External clock
Reserved
External clock
3rd overtone crystal
External clock
Reserved
External clock
Reserved
Recommended
—
171.4275 MHz
—
114.285 MHz
114.285 MHz
57.1425 MHz
—
38.88 MHz
—
Lower limit
—
163 MHz
—
109 MHz
—
55 MHz
—
37 MHz
—
Upper limit
—
180 MHz
—
125.5 MHz
—
61 MHz
—
41 MHz
—
Because the crystal is used as a jitter reference, rapid changes of the crystal temperature can temporarily disturb
the output phase and frequency. For example, it is recommended that the crystal not be placed close to a fan that
is being turned off and on. If a situation such as this is unavoidable, the crystal should be thermally isolated with an
insulating cover.
5.1.1. XA/XB Clock Drift
During VCO freeze, long-term and temperature-related drift of the XA/XB clock input results in a one-to-one drift of
the output frequency. The stability of the any frequency output is identical to the drift of the XA/XB frequency. This
means that for the most demanding applications where the drift of a crystal is not acceptable, an external
temperature-compensated or ovenized oscillator will be required. Drift is not an issue unless the part is in VCO
freeze. Also, the initial accuracy of the XA/XB oscillator (or crystal) is not relevant.
5.1.2. XA/XB Jitter
Jitter on the XA/XB input has a roughly one-to-one transfer function to the output jitter over the bandwidth ranging
from 100 Hz up to 30 kHz. If a crystal is used on the XA/XB pins, this will have low jitter if a suitable crystal is in
use. If the XA/XB pins are connected to an external oscillator, the jitter of the external oscillator may contribute
significantly to the output jitter.
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Preliminary Rev. 0.15