SI5345_16 Datasheet, PDF (40/60 Pages) Silicon Laboratories – 10-Channel, Any-Frequency, Any-Output Jitter Attenuator/ Clock Multiplier

7. Detailed Block Diagrams
Si5345/44/42 Rev D Data Sheet
Detailed Block Diagrams
IN_SEL[1:0]
IN0
IN0b
IN1
IN1b
IN2
IN2b
IN3/FB_IN
IN3/FB_INb
48-54MHz XTAL or
REFCLK
3
Si5345
÷
P0n
P0d
÷
P1n
P1d
÷
P2n
P2d
÷
P3n
P3d
XA
XB
OSC
÷ PREF
DSPLL
PD LPF
Optional
External
Feedback
÷
Mn
Md
Multi
Synth
÷
N0n
N0d
t0
÷R0
Multi
Synth
÷
N1n
N1d
t1
÷R1
Multi
Synth
÷
N2n
N2d
t2
÷R2
Multi
Synth
÷
N3n
N3d
t3
÷R3
Multi
Synth
÷
N4n
N4d
t4
÷R4
÷R5
I2C_SEL
SDA/SDIO
A1/SDO
SCLK
SPI/
I²C
NVM
÷R6
A0/CSb
÷R7
INTRb
Status
÷R8
LOLb
Monitors
÷R9
VDDO0
OUT0
OUT0b
VDDO1
OUT1
OUT1b
VDDO2
OUT2
OUT2b
VDDO3
OUT3
OUT3b
VDDO4
OUT4
OUT4b
VDDO5
OUT5
OUT5b
VDDO6
OUT6
OUT6b
VDDO7
OUT7
OUT7b
VDDO8
OUT8
OUT8b
VDDO9
OUT9
OUT9b
Figure 7.1. Si5345 Block Diagram
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