SI5345_16 Datasheet, PDF (25/60 Pages) Silicon Laboratories – 10-Channel, Any-Frequency, Any-Output Jitter Attenuator/ Clock Multiplier

Si5345/44/42 Rev D Data Sheet
Electrical Specifications
Table 5.2. DC Characteristics
V_DD = 1.8 V ±5%, V_DDA = 3.3 V ±5%, V_DDO = 1.8 V ±5%, 2.5 V ±5%, or 3.3 V ±5%, T_A = –40 to 85 °C
Parameter
Symbol
Test Condition
Min
Typ
Max
Unit
Core Supply Current^{1, 2, 3}
I_DD
I_DDA
LVPECL Output⁴
@ 156.25 MHz
—
135
260
mA
—
120
130
mA
—
22
26
mA
LVDS Output⁴
@ 156.25 MHz
—
15
18
mA
3.3 V LVCMOS Output⁵
Output Buffer Supply Current
I_DDOx
—
22
30
mA
@ 156.25 MHz
2.5 V LVCMOS Output⁵
—
18
23
mA
@ 156.25 MHz
1.8 V LVCMOS Output⁵
—
12
16
mA
@ 156.25 MHz
Si5345¹
—
900
1200
mW
Total Power Dissipation⁶
P_d
Si5344²
Si5342³
—
730
1000
mW
—
670
950
mW
Notes:
1. Si5345 test configuration: 7 x 2.5 V LVDS outputs enabled at 156.25 MHz. Excludes power in termination resistors.
2. Si5344 test configuration: 4 x 2.5 V LVDS outputs enabled at 156.25 MHz. Excludes power in termination resistors.
3. Si5342 test configuration: 2 x 2.5 V LVDS outputs enabled at 156.25 MHz. Excludes power in termination resistors.
4. Differential outputs terminated into an AC-coupled 100 Ω load.
5. LVCMOS outputs measured into a 6 inch 50 Ω PCB trace with 5 pF load. Measurements were made in CMOS3 mode.
Differential Output Test Configuration
LVCMOS Output Test Configuration
IDDO
OUT
OUTb
0.1 uF
IDDO
50
6 inch
100
50
0.1 uF
OUTa
OUTb
50
5 pF
6. Detailed power consumption for any configuration can be estimated using ClockBuilder Pro when an evaluation board (EVB) is
not available. All EVBs support detailed current measurements for any configuration.
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