SI5345_16 Datasheet, PDF (32/60 Pages) Silicon Laboratories – 10-Channel, Any-Frequency, Any-Output Jitter Attenuator/ Clock Multiplier

Si5345/44/42 Rev D Data Sheet
Electrical Specifications
Table 5.8. Performance Characteristics
V_DD = 1.8 V ±5%, V_DDA = 3.3 V ±5%, T_A = –40 to 85 °C
Parameter
Symbol
Test Condition
Min
VCO Frequency Range
F_VCO
13.5
PLL Loop Bandwidth Program-
ming Range¹
f_BW
0.1
Initial Start-Up Time
Time from power-up to
t_START
when the device gener-
—
ates free-running clocks
PLL Lock Time²
t_ACQ
f_IN = 19.44 MHz
—
t_{DELAY_frac}
—
Output Delay Adjustment
t_{DELAY_int}
f_VCO = 14 GHz
—
t_RANGE
—
POR to Serial Interface Ready³
t_RDY
—
Jitter Peaking
Measured with a frequen-
J_PK
cy plan running a 25 MHz
input, 25 MHz output, and
—
a Loop Bandwidth of 4 Hz
Jitter Tolerance
Compliant with G.8262
Options 1 and 2 Carrier
Frequency = 10.3125
J_TOL
GHz
—
Jitter Modulation
Frequency = 10 Hz
Maximum Phase Transient
During a Hitless Switch
Only valid for a single au-
tomatic switch between
two input clocks at same
—
frequency.
t_SWITCH
Only valid for a single
—
manual switch between
two input clocks at same
frequency.
Pull-in Range
ω_P
—
Typ
—
—
30
280
0.28
71.4
±9.14
—
—
3180
—
—
500
Max
14.4
4000
45
300
—
—
—
15
0.1
—
2.0
1.3
—
Unit
GHz
Hz
ms
ms
ps
ps
ns
ms
dB
UI pk-pk
ns
ns
ppm
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