SH3100 Datasheet, PDF (69/80 Pages) Semtech Corporation – Supervisory IC with I2C Interface and PWM

SH3100
POWER MANAGEMENT
Functional Descriptions (continued)
Switching Regulator Operation
The general-purpose DAC8 and comparator can be used
in conjunction with the PWM output pin as a general-pur-
pose switching regulator control. The various regulation
modes are listed in the Operating Modes section and cov-
er a variety of boost and buck configurations. In all cases
the switching frequency is set by the CLK1 rate and the
regulated voltage by the DAC8 setting.
Note 1: If the HFDCO oscillator has been put into standby by
the microcontroller, then it is turned on automatically as re-
quired for regulation, and then turned off again until the next
inductor energize cycle.
Note 2: Since fan control, LDO, and the switching regulators
all use the PWM pin, operation is mutually exclusive. It is not
possible to use the other features while one is active.
The regulator feedback may be from VDD, VBAK or the
SNSE pin as selected by the value of the 2-bit DACsel
register. In the case of VDD and VBAK, they are divided
by three before being compared with the DAC level. This
means that the regulated level on VDD or VBAK is three
times the DAC setting. In the case of SNSE feedback, the
regulated level depends on the ratio of the external di-
vider.
In all cases, the inductor energize period is eight cycles
of the CLK1 frequency followed by at least one cycle of
transfer period. If the output voltage has stabilized, then
the energize period only needs to activate occasionally
as triggered by the feedback voltage passing through the
DAC threshold. This means that for standby level loads,
the regulator only needs to activate very infrequently in
order to maintain regulation, and since the HFDCO clock
is turned off between energize cycles, the average current
consumption taken by the SH3100 is very close to the
standby current consumption of < 10μA.
The various modes may be set in the register so that they
are enabled immediately on power up, or they may be ac-
tivated later in normal operation. In addition, the start-up
regulation level may be stored in the 4-bit DACLevel regis-
ter to give the following DAC settings on power up. In boost
mode, the DAC level starts off at 0.73V and then ramps
to the programmed value over a few ms. This is to avoid
excessive start-up overshoot in boost mode regulation.
Note 3: The switching regulator function is intended only as
a low-cost support function and does not incorporate full syn-
chronous conversion due to lack of pins. Therefore, conversion
efficiency is approximately 5% to 10% lower than equivalent
synchronous systems.
Note 4: Bootstrap boost using internal switching (Mode 4) has
very low efficiency due to the higher relative impedance of the
switching FETs, so this mode should be used only if energy ef-
ficiency is not important.
p
DACLevel DAC8
0
106
1
111
2
117
3
122
4
128
5
133
6
139
7
144
p
g
DAC voltage
0.66
0.69
0.73
0.76
0.80
0.83
0.86
0.89
VDD/VBAK
1.99
2.08
2.19
2.28
2.39
2.49
2.56
2.69
DACLevel
8
9
10
11
12
13
14
15
DAC8
150
156
161
167
183
200
222
250
DAC voltage
0.93
0.97
1.00
1.04
1.14
1.24
1.38
1.55
VDD/VBAK
2.80
2.91
3.00
3.11
3.41
3.72
4.13
4.65
DAC Voltage = [1.57 * (DAC8 code / 255) + 0.01] ± 1%
© 2006 Semtech Corp.
69
www.semtech.com