SH3100 Datasheet, PDF (31/80 Pages) Semtech Corporation – Supervisory IC with I2C Interface and PWM

SH3100
POWER MANAGEMENT
Register Descriptions (continued)
Address(hex): 21
Register Name Clk1Config
Bit 7
Bit 6
Bit 5
Description
Bit 4
(R/W) Sets up CLK1
Bit 3
Bit 2
Default Value: 0000 0000
Reset Event: P, W
Bit 1
Bit 0
CLK1Supply CLK1 HF/LF Invert CLK1
Bit No.
[7]
Description
CLK1 supply
THIS REGISTER IS FUSE
INITIALIZED
[6]
CLK1 HF/LF
THIS REGISTER IS FUSE
INITIALIZED
[5]
InvertCLK1
THIS REGISTER IS FUSE
INITIALIZED
[4]
CLK1Enable
[3:0]
THIS REGISTER IS FUSE
INITIALIZED
CLK1 PostScaler
THIS REGISTER IS FUSE
INITIALIZED
CLK1Enable
Bit Value
0
1
CLK1 post-scaler
Value Description
CLK1 pad is supplied by VDD, but automatically switches over to
VBAK during VBO
CLK1 pad is supplied only by VBAK
0
CLK0 is set to 32.768 kHz
1
CLK0 is derived from the Post-scaled HFDCO
0
CLK1 is in-phase with CLK0 if CLK1=CLK0 bit in the CLK0Config
register is set
1
CLK1 is in direct antiphase with CLK0 if CLK1=CLK0 bit is set
If the CLK1=CLK0 bit is not set, then this bit has little relevance
0
CLK1 output is disabled
1
CLK1 output is enabled
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
CLK1 frequency = HFDCO frequency
CLK1 frequency = HFDCO/2
CLK1 frequency = HFDCO/4
CLK1 frequency = HFDCO/8
CLK1 frequency = HFDCO/16
CLK1 frequency = HFDCO/32
CLK1 frequency = HFDCO/64
CLK1 frequency = HFDCO/128
CLK1 frequency = HFDCO/256
CLK1 frequency = HFDCO/512
CLK1 frequency = HFDCO/1024
CLK1 frequency = HFDCO/2048
CLK1 frequency = HFDCO/4096
CLK1 frequency = HFDCO/8192
CLK1 frequency = HFDCO/16384
CLK1 frequency = HFDCO/32768
This register is ignored if the CLK1 HF/LF bit is clear.
This register is fuse-initialized
Note that this register may not be changed if the
App-specificFuseWP bit in the WriteProtects register is set
© 2006 Semtech Corp.
31
www.semtech.com