SH3100 Datasheet, PDF (64/80 Pages) Semtech Corporation – Supervisory IC with I2C Interface and PWM

SH3100
POWER MANAGEMENT
Functional Descriptions (continued)
General Purpose 8-Bit DAC & Comparator
The negative input of the comparator is driven by the out-
put of the DAC, and the positive input by one of 4 possible
input signals determined by a 4:1 analog multiplexer. Op-
eration is enabled by the DACEn bit.
The DAC is an integrating switched capacitor type and is
normally clocked at 32.768kHz, so it can run when the
HFDCO clock is disabled. The DAC can be set to a higher
frequency by setting the 2-bit DACClkDiv register.
The 4 inputs are VDD, VBAK, temperature, and SNSE and
are selected by the 2-bit DACSel register.
SNSE is a general-purpose analog input from the SNSE
pin, and can be used only if the SNSE pin is not being
used for other purposes. The voltage on SNSE must al-
ways be less than VREG.
Temperature has internal calibration correction stored in
nonvolatile memory. This compensates for process inac-
curacies in the temperature sensor to allow absolute tem-
perature accuracy of ±2°C.
Note 1: To convert the DAC reading into temperature in de-
grees Celsius, subtract the decimal DAC value from 163.
Note 2: Even though the DAC allows for a theoretical tempera-
ture range of -92°C to 163°C, operation should be assumed
to be linear only in the -40°C to 85°C range. Temperature
resolution is nominally 1 code step per °C.
The block can operate in one of two modes.
In Mode 1, the DAC is programmed with a fixed value us-
ing the ForceDACValue register and the appropriate input
signal is selected. The comparator output is then moni-
tored and when the signal either rises or falls through the
DAC threshold (as set by register bit Comparator Interrupt
Polarity) an interrupt is generated on the INT pin. This can
be useful, for example, as an independent monitor to give
a low voltage warning on VDD or VBAK without triggering
full sy stem reset or for warning if the ambient tempera-
ture rises above or falls below set thresholds. The com-
parator output state can also be read directly from the
status register.
In Mode 2, the DAC and comparator are programmed
within a successive approximation ADC controlled by the
logic. This allows ADC conversion to be performed on any
of the four inputs. The conversion is started by setting the
InitiateA2D register bit in the Config register. Conversion
completes in approximately 1000 cycles of the DACClk
frequency, and is indicated by the ADCComplete interrupt
and interrupt status. In automatic fan speed control mode
(the default mode of the SH3100), the block is automati-
cally set up in ADC mode to measure temperature. The
following tables show the four possible input signals and
signal values for different DAC codes, plus the functional
specifications.
Note 3: If VBAK is being monitored, then there is additional
current drain of a few μA from VBAK due to an internal resis-
tive divider.
© 2006 Semtech Corp.
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