SH3100 Datasheet, PDF (39/80 Pages) Semtech Corporation – Supervisory IC with I2C Interface and PWM

SH3100
POWER MANAGEMENT
Register Descriptions (continued)
Address(hex): 37
Register Name INTConfig
Description
(R/W) Configures the operation Default Value: 0000 0000
of the INT pin
Reset Event: P, W, B
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Bit No.
Edge or Level
Description
I²C ShortCode
Enable
Value at INT pin GPIO polarity GPIO Direction
Bit Value Value Description
Enable INT
Toggling
Interrupt or
GPIO
[6]
Edge or Level
[5]
I2CShortCodeEnable
[4]
ValueAtINTPin
[3]
GPIOPolarity
[2]
GPIODirection
[1]
EnableINTToggling
[0]
InterruptOrGPIO
0
When the INT pin is programmed as an interrupt by setting
InterruptOrGPIO to 1, the INT pin signals each interrupt as a
pulse with a duration of 4 CLK0 cycles
1
The INT pin drives to its active level (set by GPIOPolarity bit), and
remains until the interrupt is cleared by writing the relevant bit
in the InterruptStatus register. If toggling interrupts are
required, then this bit must be set to 1
0
Interrupts can only be cleared with a full-length I²C access.
1
All active interrupts are simultaneously cleared when a short-
form version of the I²C access is sent by the microcontroller.
This allows for substantially faster interrupt clearing
0
The INT pin is being driven externally or internally to 0
1
The INT pin is being driven externally or internally to 1
0
If InterruptOrGPIO = 0 (GPIO), then INT pin is driven to 0. If
InterruptOrGPIO = 1 (Interrupt), then INT is hard-driven to 0
when the interrupt is active, but weak-pulled to 1 when inactive
1
If InterruptOrGPIO = 0 (GPIO), then INT pin is driven to 1. If
InterruptOrGPIO = 1 (Interrupt), then INT is hard-driven to 1
when the interrupt is active, but weak-pulled to 0 when inactive
0
When InterruptOrGPIO = 0 (GPIO mode), INT pin is programmed
as a general-purpose input port
1
When InterruptOrGPIO = 0 (GPIO mode), INT pin is programmed
as a general-purpose output port
0
All Active interrupts are signaled either by a 4 cycle pulse, or by
a fixed level, as determined by the EdgeOrLevel bit in this
register
1
The PIT toggles the INT pin at every activation. This can be used
to generate a very slow clock independent of CLK0 and CLK1,
with a period between 61 μs and 72 hours
In this mode all other interrupts operate normally, but may be
masked if the INT pin has been driven to the active state by a
PIT timeout
0
INT pin is used as GPIO, with direction defined by GPIODirection
bit, and polarity set by GPIOPolarity bit.
1
INT pin is used to signal interrupts, and hard-drives to the active
level, weak-pull to the inactive level.
© 2006 Semtech Corp.
39
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