SH3100 Datasheet, PDF (25/80 Pages) Semtech Corporation – Supervisory IC with I2C Interface and PWM

SH3100
POWER MANAGEMENT
Register Descriptions (continued)
Address(hex): 10
Register Name RTC
Description
Bit 7
Bit No.
[6:4]
[3:0]
Bit 6
Bit 5
Seconds (MSD)
Description
Seconds (MSD)
Seconds (LSD)
Bit 4
Bit Value
00 (hex)
00 (hex)
(R/W) Real Time Clock.
Bit 3
Bit 2
Default Value: 0000 0000
Reset Event: P
Bit 1
Bit 0
Seconds (LSD)
Value Description
Upper digit of the Binary Coded Decimal seconds count
Lower digit of the BCD seconds count. Cycles from 00 (BCD) to
59 (BCD)
See also 0B description
Address(hex): 11
Register Name RTC
Bit 7
Bit 6
Bit No.
[7:0]
Description
SubSeconds
Bit 5
Bit Value
00 (hex)
Description
Bit 4
(R/W) Real Time Clock.
Bit 3
Bit 2
Default Value: 0000 0000
Reset Event: P
Bit 1
Bit 0
SubSeconds
Value Description
Least significant byte of the RTC, incrementing at 256 Hz from 00 to FF. Note that
this is the only RTC byte which is NOT BCD coded
Writing to this register loads all six bytes of RTC into the counter after up to two
periods of the 256 Hz clock, i.e. 7.8 ms later. It is important that no writes or
reads to either WakeupTime, RTC, PeriodicTimer nor DCOCode occur during this
period
When reading the RTC, this must be the first byte read
Address(hex): 14
Register Name InterruptEnable
Bit 7
Bit No.
[5]
Bit 6
Bit 5
SNSE Fault
Description
SNSE Fault interrupt enable
[4]
ADC conversion complete
indicator interrupt enable
[2]
RTC alarm interrupt enable
[1]
Comparator trigger interrupt
enable
[0]
PIT interrupt enable
© 2006 Semtech Corp.
Description
(R/W) Selects which interrupt Default Value: 0000 0000
sources generate interrupts ^{Reset Event: P, W, B}
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
ADC Done
Bit Value
0
1
0
1
0
1
0
1
0
1
RTC Alarm
Comparator
trigger
PIT expired
Value Description
SNSE fault interrupts disabled
SNSE fault interrupts enabled
If the DeviceMode fuse (address 18, bits [5:3]) are set for fan
control mode, this bit is automatically set on startup, but it may
be overridden
ADC complete interrupts disabled
ADC complete interrupts enabled
RTC alarm interrupt disabled
RTC alarm interrupt enabled
Comparator interrupt disabled
Comparator interrupt enabled
PIT interrupt disabled
PIT interrupt enabled
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