K4R271669A Datasheet, PDF (5/64 Pages) Samsung semiconductor – 256K x 16/18 bit x 2*16 Dependent Banks Direct RDRAMTM

K4R271669A/K4R441869A
Direct RDRAM^™
Table 3: Pin Description
Signal
SIO1,SIO0
I/O
Type
I/O
CMOS^a
CMD
I
CMOS^a
SCK
V_DD
V_DDa
V_CMOS
GND
GNDa
DQA8..DQA0
I
CMOS^a
I/O
RSL^b
CFM
CFMN
I
RSL^b
I
RSL^b
V_REF
CTMN
I
CTM
I
RQ7..RQ5 or
I
ROW2..ROW0
RQ4..RQ0 or
I
COL4..COL0
DQB8..
I/O
DQB0
RSL^b
RSL^b
RSL^b
RSL^b
RSL^b
Total pin count per package
# of Pins
2
1
1
10
1
2
13
1
9
1
1
1
1
1
3
5
9
62
Description
Serial input/output. Pins for reading from and writing to the control
registers using a serial access protocol. Also used for power man-
agement.
Command input. Pins used in conjunction with SIO0 and SIO1 for
reading from and writing to the control registers. Also used for
power management.
Serial clock input. Clock source used for reading from and writing to
the control registers
Supply voltage for the RDRAM core and interface logic.
Supply voltage for the RDRAM analog circuitry.
Supply voltage for CMOS input/output pins.
Ground reference for RDRAM core and interface.
Ground reference for RDRAM analog circuitry.
Data byte A. Nine pins which carry a byte of read or write data
between the Channel and the RDRAM. DQA8 is not used by
RDRAMs with a x16 organization.
Clock from master. Interface clock used for receiving RSL signals
from the Channel. Positive polarity.
Clock from master. Interface clock used for receiving RSL signals
from the Channel. Negative polarity
Logic threshold reference voltage for RSL signals
Clock to master. Interface clock used for transmitting RSL signals
to the Channel. Negative polarity.
Clock to master. Interface clock used for transmitting RSL signals
to the Channel. Positive polarity.
Row access control. Three pins containing control and address
information for row accesses.
Column access control. Five pins containing control and address
information for column accesses.
Data byte B. Nine pins which carry a byte of read or write data
between the Channel and the RDRAM. DQB8 is not used by
RDRAMs with a x16 organization.
a. All CMOS signals are high-true; a high voltage is a logic one and a low voltage is logic zero.
b. All RSL signals are low-true; a low voltage is a logic one and a high voltage is logic zero.
Page 3
Rev. 1.02 Jan. 2000