S3C24A0A Datasheet, PDF (358/519 Pages) Samsung semiconductor – 32-BIT RISC MICROPROCESSOR

CAMERA INTERFACE
S3C24A0A RISC MICROPROCESSOR (Preliminary Spec)
CODEC PRE-SCALER CONTROL REGISTER 1
Register
Address
CICOSCPRERATIO 0x48000050
R/W
Description
RW Codec pre-scaler ratio control
CICOSCPRERATIO
SHfactor_Co
PreHorRatio_Co
PreVerRatio_Co
Bit
[31:28]
[22:16]
[6:0]
Description
Shift factor for codec pre-scaler
Horizontal ratio of codec pre-scaler
Vertical ratio of codec pre-scaler
CODEC PRE-SCALER CONTROL REGISTER 2
Register
CICOSCPREDST
Address
0x48000054
R/W
Description
RW Codec pre-scaler destination format
Reset Value
0
Initial State
0
0
0
Reset Value
0
CICOSCPREDST
PreDstWidth_Co
PreDstHeight_Co
Bit
[27:16]
[11:0]
Description
Destination width for codec pre-scaler
Destination height for codec pre-scaler
CODEC MAIN-SCALER CONTROL REGISTER
Register
CICOSCCTRL
Address
0x48000058
R/W
Description
RW Codec main-scaler control
Initial State
0
0
Reset Value
0
CICOSCCTRL
ScalerBypass_Co
ScaleUpDown_Co
MainHorRatio_Co
CoScalerStart
MainVerRatio_Co
Bit
[31]
[30:29]
[24:16]
[15]
[8:0]
Description
Codec scaler bypass for upper 2048 x 2048 size (In this
case, ImgCptEn_CoSC and ImgCptEn_PrSC should be 0, but
ImgCptEn should be 1. It is not allowed to capturing preview
image. This mode is intended to capture JPEG input image
for DSC application) In this case, input pixel buffering
depends on only input FIFOs, so system bus should be not
busy in this mode.
Scale up/down flag for codec scaler(In 1:1 scale ratio, this bit
should be “1”)
00 = Down
11 = Up
Horizontal scale ratio for codec main-scaler
Codec scaler start
Vertical scale ratio for codec main-scaler
Initial State
0
00
0
0
0
21-22
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
Specifications and information herein are subject to change without notice.