S3C24A0A Datasheet, PDF (105/519 Pages) Samsung semiconductor – 32-BIT RISC MICROPROCESSOR

S3C24A0A RISC MICROPROCESSOR (Preliminary Spec)
SDRAM CONTROLLER
SCLK
SCKE
ADDR
Ra
BA
Ba
A10/AP
Ra
nSCS
nRAS
nCAS
nWE
DATA (CL2)
DATA (CL3)
DQM
Ca
Ba
Trcd
Trc
Rb
Ba
Bb
Rb
Trp
Da
Db
Dc
Dd
Da
Db
Dc
Dd
Row
Active(A bank)
Read (A bank)
(CL = 2 or CL = 3, BL = 4)
Bank A
Precharge
Row
Active(B bank)
Cb
Bb
Da
Db
Dc
Dd
Da
Db
Dc
Dd
Write
(B bank)
Figure 3-3. SDRAM Timing Diagram
Preliminary product information describe products that are in development,
3-5
for which full characterization data and associated errata are not yet available.
Specifications and information herein are subject to change without notice.