S3C24A0A Datasheet, PDF (156/519 Pages) Samsung semiconductor – 32-BIT RISC MICROPROCESSOR

S3C24A0A RISC MOCROPROCESSOR (Preliminary Spec)
PWM TIMER
PWM TIMER OPERATION
PRESCALER & DIVIDER
An 8-bit prescaler and 4-bit divider has the following output frequencies:
4-bit Divider Settings
1/2 ( PCLK = 55 MHz )
1/4 ( PCLK = 55 MHz )
1/8 ( PCLK = 55 MHz )
1/16 ( PCLK = 55 MHz )
Minimum Resolution
(prescaler = 0)
0.0363 us (27.5000 MHz )
0.0727 us (13.7500 MHz )
0.1454us ( 6.8750 MHz )
0.2909 us ( 3.4375 MHz )
Maximum Resolution
(prescaler = 255)
9.3090 us (107.4219 kHz )
18.6181 us (53.7109 kHz )
37.2363 us (26.8554 kHz )
74.4729 us (13.4277 kHz )
Maximum Interval
(TCNTBn = 65535)
0.6100 sec
1.2201 sec
2.4403 sec
4.8806 sec
BASIC TIMER OPERATION
start bit=1 timer is started
TCNTn=TCMPn
auto-reload
TCNTn=TCMPn
timer is stopped.
TCMPn
1
0
TCNTn
3
3
2
1
0
2
1
0
0
TCNTBn=3
TCMPBn=1
manual update=1
auto-reload=1
TCNTBn=2
TCMPBn=0
manual update=0
auto-reload=1
auto-reload=0
interrupt request
interrupt request
TOUTn
command
status
Figure 7-2. Timer operations
A timer (except the timer ch-5) has TCNTBn, TCNTn, TCMPBn and TCMPn. TCNTBn and TCMPBn are loaded
into TCNTn and TCMPn when the timer reaches 0. When TCNTn reaches 0, the interrupt request will occur if the
interrupt is enabled. (TCNTn and TCMPn are the names of the internal registers. The TCNTn register can be read
from the TCNTOn register)
Preliminary product information describe products that are in development,
7-3
for which full characterization data and associated errata are not yet available.
Specifications and information herein are subject to change without notice.