S3C24A0A Datasheet, PDF (325/519 Pages) Samsung semiconductor – 32-BIT RISC MICROPROCESSOR

I/O PORTS
S3C24A0A RISC MICROPROCESSOR (Preliminary Spec)
EXTERNAL INTERRUPT PENDING REGISTER (EINTPEND)
Interrupt pending register for 18 external interrupts (EINT[18:11, 9:0]). If the S3C24A0A wake-up from sleep mode
by RTC alarm, the PMWKUP bit is set instead of INT_RTC bit in INTPND and INTSRCPND register. You can
clear a specific bit of EINTPEND register by writing a data (‘1’) to this register. It clears only the bit positions of
EINTPEND corresponding to those set to one in the data. The bit positions corresponding to those that are set to
0 in the data remains as they are with no change.
Register
EINTPEND
Address
0x44800038
R/W
Description
R/W External interupt pending register
Reset Value
0x0
EINTPEND
PMWKUP
EINT18
EINT17
EINT16
EINT15
EINT14
EINT13
EINT12
EINT11
Reserved
EINT9
EINT8
EINT7
EINT6
EINT5
EINT4
EINT3
EINT2
EINT1
EINT0
Bit
Description
[19] RTC Alarm Interrupt.
0 = Not occur
1= Occur interrupt
[18] 0 = Not occur
1= Occur interrupt
[17] 0 = Not occur
1= Occur interrupt
[16] 0 = Not occur
1= Occur interrupt
[15] 0 = Not occur
1= Occur interrupt
[14] 0 = Not occur
1= Occur interrupt
[13] 0 = Not occur
1= Occur interrupt
[12] 0 = Not occur
1= Occur interrupt
[11] 0 = Not occur
1= Occur interrupt
[10] Reserved
[9]
0 = Not occur
1= Occur interrupt
[8]
0 = Not occur
1= Occur interrupt
[7]
0 = Not occur
1= Occur interrupt
[6]
0 = Not occur
1= Occur interrupt
[5]
0 = Not occur
1= Occur interrupt
[4]
0 = Not occur
1= Occur interrupt
[3]
0 = Not occur
1= Occur interrupt
[2]
0 = Not occur
1= Occur interrupt
[1]
0 = Not occur
1= Occur interrupt
[0]
0 = Not occur
1= Occur interrupt
20-14
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
Specifications and information herein are subject to change without notice.