RX21A_15 Datasheet, PDF (8/132 Pages) Renesas Technology Corp – Renesas MCUs

RX21A Group
1.3 Block Diagram
Figure 1.2 shows a block diagram (100-pin package).
1. Overview
ROM
RAM
RX CPU
MPU
Clock
generation
circuit
ICUb
DTCa
DMACA × 4
channels
E2 DataFlash
WDTA
IWDTa
ELC
CRC
SCIc × 5 channels
(including one channel for IrDA)
RSPI × 2 channels
RIIC × 2 channels
MTU2a × 6 channels
POE2a
TMR × 2 channels (unit 0)
TMR × 2 channels (unit 1)
CMT × 2 channels (unit 0)
CMT × 2 channels (unit 1)
RTCc
24-bit  A/D converter × 7 channels
10-bit A/D converter × 7 channels
Temperature sensor
10-bit D/A converter × 2 channels
DOC
DEU
Comparator A × 2 channels
Comparator B × 2 channels
CAC
BSC
Port 0
Port 1
Port 2
Port 3
Port 4
Port 5
Port A
Port B
Port C
Port E
Port H
Port J
MPU: Memory protection unit
ICUb: Interrupt controller
DTCa: Data transfer controller
DMACA: DMA controller
BSC: Bus controller
WDTA: Watchdog timer
IWDTa: Independent watchdog timer
ELC:
Event link controller
CRC: CRC (cyclic redundancy check) calculator
SCIc: Serial communications interface
IrDA: Infrared data association
Figure 1.2
Block Diagram (100-Pin Package)
RSPI: Serial peripheral interface
RIIC: I²C bus interface
MTU2a: Multi-function timer pulse unit 2
POE2a: Port output enable 2
TMR: 8-bit timer
CMT: Compare match timer
RTCc: Realtime clock
DOC: Data operation circuit
DEU: Data encryption unit
CAC: Clock-frequency accuracy measuring circuit
R01DS0129EJ0110 Rev.1.10
Aug 28, 2014
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