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RX21A_15 Datasheet, PDF (4/132 Pages) Renesas Technology Corp – Renesas MCUs
RX21A Group
1. Overview
Table 1.1
Outline of Specifications (3 / 4)
Classification
Communication
function
Module/Function
Serial communications
interfaces (SCIc)
IrDA interface (IRDA)
I2C bus interface (RIIC)
Serial peripheral
interface (RSPI)
24-bit ∆Σ A/D converter (DSAD)
10-bit A/D converter (AD)
Temperature sensor (TEMPSa)
D/A converter (DA)
CRC calculator (CRC)
Data encryption unit (DEU)*1
Comparator A (CMPA)
Comparator B (CMPB)
Data operating circuit (DOC)
Power supply voltage/ Operating frequency
Supply current
Operating temperature
Description
 5 channels (channel 1, 5, 6, 8, 9) (including one channel for IrDA)
 Serial communications modes:
Asynchronous, clock synchronous, and smart-card interface
 On-chip baud rate generator allows selection of the desired bit rate
 Choice of LSB-first or MSB-first transfer
 Average transfer rate clock can be input from TMR timers (SCI5 and SCI6)
 Simple IIC
 Simple SPI
 1 channel (SCI5 is used)
 Supports encoding/decoding the waveforms conforming to the IrDA specification version 1.0
 2 channels
 Communications formats:
I2C bus format/SMBus format
 Master/slave selectable
 Supports the fast mode
 2 channels
 Transfer facility
Using the MOSI (master out, slave in), MISO (master in, slave out), SSL (slave select), and RSPI
clock (RSPCK) signals enables serial transfer through SPI operation (four lines) or clock-
synchronous operation (three lines)
 Capable of handling serial transfer as a master or slave
 Data formats
 Choice of LSB-first or MSB-first transfer
The number of bits in each transfer can be changed to any number of bits from 8 to 16, 20, 24, or 32
bits.
128-bit buffers for transmission and reception
Up to four frames can be transmitted or received in a single transfer operation (with each frame
having up to 32 bits)
 Double buffers for both transmission and reception
 7 channels: 4-channel differential input for current; 3-channel single-ended input for voltage
 x 1 to x 64 PGA for differential input side for current and x 1 to x 4 PGA for single-ended input side for
voltage
 Minimum conversion time: 81.92 μs (A/D conversion clock: 25 MHz)
 10 bits (7 channels x 1 unit)
 10-bit resolution
 Conversion time: 2.0 μs per channel (A/D conversion clock: 25 MHz)
 Operating modes
Scan mode (single scan mode and continuous scan mode)
 Sample-and-hold function
 Self-diagnosis for the A/D converter
 Assistance in detecting disconnected analog inputs
 A/D conversion start conditions
Conversion can be started by software, a conversion start trigger from a timer (MTU), an external
trigger signal, a temperature sensor or ELC.
 Outputs the voltage that changes depending on the temperature
 PGA gain switchable: Three levels according to the voltage range
 2 channels
 10-bit resolution
 Output voltage: 0 V to VREFH
 CRC code generation for arbitrary amounts of data in 8-bit units
 Select any of three generating polynomials:
X8 + X2 + X + 1, X16 + X15 + X2 + 1, or X16 + X12 + X5 + 1
 Generation of CRC codes for use with LSB-first or MSB-first communications is selectable.
 Encryption and decryption of AES
 128-, 192-, or 256-bit key length
 ECB or CBC mode
 2 channels
 Comparison of reference voltage and analog input voltage
 2 channels
 Comparison of reference voltage and analog input voltage
Comparison, addition, and subtraction of 16-bit data
VCC = 1.8 to 3.6 V: 25 MHz, VCC = 2.7 to 3.6 V: 50 MHz
8.6mA@50MHz (typ)
D version: –40 to +85°C, G version: –40 to +105°C*2, *3
R01DS0129EJ0110 Rev.1.10
Aug 28, 2014
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