RX21A_15 Datasheet, PDF (26/132 Pages) Renesas Technology Corp – Renesas MCUs

RX21A Group
2. CPU
Figure 2.1 shows the register set of the CPU.
2. CPU
General-purpose register
b31
b0
R0 (SP) ^*1
R1
R2
R3
R4
R5
R6
R7
R8
R9
R10
R11
R12
R13
R14
R15
Control register
b31
b0
ISP
(Interrupt stack pointer)
USP
(User stack pointer)
INTB
(Interrupt table register)
PC
(Program counter)
PSW
(Processor status word)
BPC
BPSW
(Backup PC)
(Backup PSW)
FINTV (Fast interrupt vector register)
DSP instruction register
b63
b0
ACC (Accumulator)
Note 1. The stack pointer (SP) can be the interrupt stack pointer (ISP) or user stack pointer (USP), according to
the value of the U bit in the PSW register.
Figure 2.1
Register Set of the CPU
R01DS0129EJ0110 Rev.1.10
Aug 28, 2014
Page 26 of 132