RX21A_15 Datasheet, PDF (29/132 Pages) Renesas Technology Corp – Renesas MCUs

RX21A Group
Single-chip mode*¹
0000 0000h
0001 0000h
0008 0000h
0010 0000h
0010 2000h
RAM*²
Reserved area*³
Peripheral I/O registers
On-chip ROM (E2 DataFlash)
(8 KB)
Reserved area*³
007F C000h
007F C500h
Peripheral I/O registers
Reserved area*³
007F FC00h
0080 0000h
00F8 0000h
0100 0000h
Peripheral I/O registers
Reserved area*³
On-chip ROM (program ROM)
(write only) (512 KB)
Reserved area*³
3. Address Space
FEFF E000h
FF00 0000h
FF7F C000h
FF80 0000h
On-chip ROM
(read only)*⁴
Reserved area*³
On-chip ROM (user boot)
(read only)
Reserved area*³
FFE0 0000h
FFFF FFFFh
On-chip ROM (program ROM)
(read only)*²
Note 1. The address space in boot mode and user boot mode is the same as the address space in single-chip mode.
Note 2. The capacity of ROM/RAM differs depending on the products.
Capacity
512 K
384 K
256 K
ROM (bytes)
Address
FFF8 0000h to FFFF FFFFh
FFFA 0000h to FFFF FFFFh
FFFC 0000h to FFFF FFFFh
Capacity
64 K
RAM (bytes)
Address
0000 0000h to 0000 FFFFh
32 K
0000 0000h to 0000 7FFFh
Note:•See Table 1.3, List of Products, for the product type name.
Note 3.
Note 4.
Reserved areas should not be accessed.
Only some specific addresses are usable. For details, see following sections in the RX21A Group User’s Manual: Hardware.
Section 34.2.11, ∆Σ A/D Input Impedance Calibration Data Register (DSADIIC)
Section 34.2.12, ∆Σ A/D Gain Calibration Data Registers (DSADGmXn) (m = 0 to 6, n = 1, 2, 4, 8, 16, and 32)
Section 37.2.2, Temperature Sensor Calibration Data Registers (TSCDRn) (n = 0,1,3)
Section 37.3, Using the Temperature Sensor
Section 42.2.15, Unique ID Registers (UIDRn) (n = 0 to 3)
Figure 3.1
Memory Map
R01DS0129EJ0110 Rev.1.10
Aug 28, 2014
Page 29 of 132