RX21A_15 Datasheet, PDF (42/132 Pages) Renesas Technology Corp – Renesas MCUs

RX21A Group
4. I/O Registers
Table 4.1
List of I/O Registers (Address Order) (11 / 24)
Address
0008 830Dh
0008 830Eh
0008 830Fh
0008 8310h
0008 8311h
0008 8312h
0008 8313h
0008 8320h
0008 8321h
0008 8322h
0008 8323h
0008 8324h
0008 8325h
0008 8326h
0008 8327h
0008 8328h
0008 8329h
0008 832Ah
0008 832Ah
0008 832Bh
0008 832Bh
0008 832Ch
0008 832Dh
0008 832Eh
0008 832Fh
0008 8330h
0008 8331h
0008 8332h
0008 8333h
0008 8380h
0008 8381h
0008 8382h
0008 8383h
0008 8384h
0008 8388h
0008 8389h
0008 838Ah
0008 838Bh
0008 838Ch
0008 838Dh
0008 838Eh
0008 838Fh
0008 8390h
0008 8392h
0008 8394h
0008 8396h
0008 8398h
0008 839Ah
0008 839Ch
0008 839Eh
0008 83A0h
Module
Symbol
RIIC0
RIIC0
RIIC0
RIIC0
RIIC0
RIIC0
RIIC0
RIIC1
RIIC1
RIIC1
RIIC1
RIIC1
RIIC1
RIIC1
RIIC1
RIIC1
RIIC1
RIIC1
RIIC1
RIIC1
RIIC1
RIIC1
RIIC1
RIIC1
RIIC1
RIIC1
RIIC1
RIIC1
RIIC1
RSPI0
RSPI0
RSPI0
RSPI0
RSPI0
RSPI0
RSPI0
RSPI0
RSPI0
RSPI0
RSPI0
RSPI0
RSPI0
RSPI0
RSPI0
RSPI0
RSPI0
RSPI0
RSPI0
RSPI0
RSPI0
RSPI1
Register Name
Slave address register U1
Slave address register L2
Slave address register U2
I²C bus bit rate low-level register
I²C bus bit rate high-level register
I²C bus transmit data register
I²C bus receive data register
I²C bus control register 1
I²C bus control register 2
I²C bus mode register 1
I²C bus mode register 2
I²C bus mode register 3
I²C bus function enable register
I²C bus status enable register
I²C bus interrupt enable register
I²C bus status register 1
I²C bus status register 2
Slave address register L0
Timeout internal counter L
Slave address register U0
Timeout internal counter U
Slave address register L1
Slave address register U1
Slave address register L2
Slave address register U2
I²C bus bit rate low-level register
I²C bus bit rate high-level register
I²C bus transmit data register
I²C bus receive data register
RSPI control register
RSPI slave select polarity register
RSPI pin control register
RSPI status register
RSPI data register
RSPI sequence control register
RSPI sequence status register
RSPI bit rate register
RSPI data control register
RSPI clock delay register
RSPI slave select negation delay register
RSPI next-access delay register
RSPI control register 2
RSPI command register 0
RSPI command register 1
RSPI command register 2
RSPI command register 3
RSPI command register 4
RSPI command register 5
RSPI command register 6
RSPI command register 7
RSPI control register
Register
Symbol
SARU1
SARL2
SARU2
ICBRL
ICBRH
ICDRT
ICDRR
ICCR1
ICCR2
ICMR1
ICMR2
ICMR3
ICFER
ICSER
ICIER
ICSR1
ICSR2
SARL0
TMOCNTL
SARU0
TMOCNTU
SARL1
SARU1
SARL2
SARU2
ICBRL
ICBRH
ICDRT
ICDRR
SPCR
SSLP
SPPCR
SPSR
SPDR
SPSCR
SPSSR
SPBR
SPDCR
SPCKD
SSLND
SPND
SPCR2
SPCMD0
SPCMD1
SPCMD2
SPCMD3
SPCMD4
SPCMD5
SPCMD6
SPCMD7
SPCR
Number of Access Cycles
Number Access ICLK 
of Bits Size
PCLK
ICLK <
PCLK
8
8
2, 3 PCLKB
2 ICLK
8
8
2, 3 PCLKB
2 ICLK
8
8
2, 3 PCLKB
2 ICLK
8
8
2, 3 PCLKB
2 ICLK
8
8
2, 3 PCLKB
2 ICLK
8
8
2, 3 PCLKB
2 ICLK
8
8
2, 3 PCLKB
2 ICLK
8
8
2, 3 PCLKB
2 ICLK
8
8
2, 3 PCLKB
2 ICLK
8
8
2, 3 PCLKB
2 ICLK
8
8
2, 3 PCLKB
2 ICLK
8
8
2, 3 PCLKB
2 ICLK
8
8
2, 3 PCLKB
2 ICLK
8
8
2, 3 PCLKB
2 ICLK
8
8
2, 3 PCLKB
2 ICLK
8
8
2, 3 PCLKB
2 ICLK
8
8
2, 3 PCLKB
2 ICLK
8
8
2, 3 PCLKB
2 ICLK
8
8
2, 3 PCLKB
2 ICLK
8
8
2, 3 PCLKB
2 ICLK
8
8*²
2, 3 PCLKB
2 ICLK
8
8
2, 3 PCLKB
2 ICLK
8
8
2, 3 PCLKB
2 ICLK
8
8
2, 3 PCLKB
2 ICLK
8
8
2, 3 PCLKB
2 ICLK
8
8
2, 3 PCLKB
2 ICLK
8
8
2, 3 PCLKB
2 ICLK
8
8
2, 3 PCLKB
2 ICLK
8
8
2, 3 PCLKB
2 ICLK
8
8
2, 3 PCLKB
2 ICLK
8
8
2, 3 PCLKB
2 ICLK
8
8
2, 3 PCLKB
2 ICLK
8
8
2, 3 PCLKB
2 ICLK
32
16, 32
2, 3 PCLKB
2 ICLK
8
8
2, 3 PCLKB
2 ICLK
8
8
2, 3 PCLKB
2 ICLK
8
8
2, 3 PCLKB
2 ICLK
8
8
2, 3 PCLKB
2 ICLK
8
8
2, 3 PCLKB
2 ICLK
8
8
2, 3 PCLKB
2 ICLK
8
8
2, 3 PCLKB
2 ICLK
8
8
2, 3 PCLKB
2 ICLK
16
16
2, 3 PCLKB
2 ICLK
16
16
2, 3 PCLKB
2 ICLK
16
16
2, 3 PCLKB
2 ICLK
16
16
2, 3 PCLKB
2 ICLK
16
16
2, 3 PCLKB
2 ICLK
16
16
2, 3 PCLKB
2 ICLK
16
16
2, 3 PCLKB
2 ICLK
16
16
2, 3 PCLKB
2 ICLK
8
8
2, 3 PCLKB
2 ICLK
R01DS0129EJ0110 Rev.1.10
Aug 28, 2014
Page 42 of 132