NS16C2552 Datasheet, PDF (8/43 Pages) National Semiconductor (TI) – Dual UART with 16-byte/64-byte FIFOs and up to 5 Mbit/s Data Rate

5.0 Pin Descriptions (Continued)
5.3 CLOCK AND RESET
Signal
Name
XIN
XOUT
MR
Type
I
O
I
PLCC
Pin #
11
13
21
TQFP
Pin #
5
7
16
Description
External Crystal Input:
XIN input is used in conjunction with XOUT to form a feedback circuit for
the baud rate generator’s oscillator. If a clock signal is generated
off-chip, then it should drive the baud rate generator through this pin.
Refer to Section 7.1 CLOCK INPUT.
External Crystal Output:
XOUT output is used in conjunction with XIN to form a feedback circuit
for the baud rate generator’s oscillator. If the clock signal is generated
off-chip, then this pin is unused. Refer to Section 7.1 CLOCK INPUT.
Master Reset:
When MR input is high, it clears all the registers including Tx and Rx
serial shift registers (except the Receiver Buffer, Transmitter Holding,
and Divisor Latches). The output signals, such as OUT2, RTS, DTR,
INTR, and SOUT are also affected by an active MR input. (Refer to
Table 26 and Section 7.2 RESET).
5.4 POWER AND GROUND
Signal
Name
VCC
GND
NC
Type
I
I
I
PLCC
Pin #
33
44
12
22
N/A
TQFP
Pin #
29
42
6
17
19
37
Description
V_CC:
+2.97V to +5.5V supply.
GND:
Device ground reference.
No Connection:
These pins are only available on the TQFP package.
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