NS16C2552 Datasheet, PDF (31/43 Pages) National Semiconductor (TI) – Dual UART with 16-byte/64-byte FIFOs and up to 5 Mbit/s Data Rate

7.0 Operation and Configuration
(Continued)
20204813
FIGURE 11. TXRDY in DMA Mode 0
7.4.3 Transmit Hardware Flow Control
CTS is a flow control input used to prevent remote receiver
FIFO data overflow. The CTS input is monitored to suspend/
resume the local transmitter. The automatic CTS flow control
can be enabled to suit specific application.
• Enable auto CTS flow control EFR[7]=1.
7.4.4 Transmit Flow Control Interrupt
• Enable auto CTS flow control EFR[7]=1.
• Enable CTS interrupt IER[7]=1.
An interrupt is generated when CTS pin is de-asserted (logic
1). IIR[5] is set to logic 1. The transmitter suspends trans-
mission as soon as the stop bit is shifted out. Transmission is
resumed after the CTS pin is asserted logic 0, indicating
remote receiver is ready to accept data word.
7.5 SOFTWARE XON/XOFF FLOW CONTROL
Software flow control uses programmed Xon or Xoff charac-
ters to enable the transmit/receive flow control. The receiver
compares one or two sequentially received data words. If the
received character(s) match the programmed values, the
transmitter suspends operation as soon as the current trans-
mitting frame is completed. When a match occurs, the Xoff (if
enabled via IER[5]) flag is set and an interrupt is generated.
Following a transmission suspension, the UART monitors
the receive data stream for an Xon character. When a match
is found, the transmission resumes and the IIR[4] flag clears.
Upon reset, the Xon/Xoff characters are cleared to logic 0.
The user may write any Xon/Xoff value desired for software
flow control. Different conditions can be set to detect Xon/
Xoff characters and suspend/resume transmissions. When
double 8-bit Xon/Xoff characters are selected, the UART
compares two consecutively received characters with two
software flow control 8-bit values (Xon1, Xon2, Xoff1, and
Xoff2) and controls transmission accordingly. Under the
above described flow control mechanisms, flow control char-
acters are not placed in the user accessible Rx data buffer or
FIFO.
During the flow control operation, when Receive FIFO
pointer reaches the upper trigger level, the UART automati-
cally transmits Xoff1 and Xoff 2 messages via the serial TX
line output to the remote modem. When Receive FIFO
pointer position matches the lower trigger level, the UART
automatically transmits Xon1 and Xon2 characters.
Care should be taken when designing the software flow
control section of the driver. In the case where a local UART
is transmitting and the remote UART initiates flow control, an
Xoff character is sent by the remote UART.
Upon receipt the local UART ceases to transmit until such
time as the remote UART FIFO has been drained sufficiently
and it signals that it can accept further data by sending an
Xon character to the local UART.
There is a corner case in which the receipt of an Xoff by the
local UART can occur just after it has sent the last character
of a data transfer and is ready to close the transmission. If in
so doing the driver disables the local UART, it may not
receive the corresponding XON and thus can remain in a
flow-controlled state. This will persist even when the UART is
re-enabled for a succeeding transmission creating a lock-up
situation.
To resolve this lock-up issue, the driver should implement a
delay before shutting down the local transmitter at the end of
a data transfer. This delay time should be equal to the
transmission time of four characters PLUS the latency re-
quired to drain the RX FIFO on the remote side of the
connection. This will allow the remote modem to send an
Xon character and for it to be received before the local
transmitter shuts down.
TABLE 29. Xon/Xoff SW Flow Control on NS16C2552
Rx Trigge
Level
1
4
8
14
INTR Pin
Activation
1
4
8
14
Xoff Char
Sent
1
4
8
14
Xon Char
Sent
0
1
4
8
TABLE 30. Xon/Xoff SW Flow Control on NS16C2752
Rx Trigger
Level
8
16
56
60
INTR Pin
Activation
8
16
56
60
Xoff Char
Sent
8
16
56
60
Xon Char
Sent
0
8
16
56
7.6 SPECIAL CHARACTER DETECT
UART can detect an 8-bit special character if EFR[5]=1.
When special character detect mode is enabled, the UART
compares each received character with Xoff2. If a match is
found, Xoff2 is loaded into the FIFO along with the normal
received data and IIR[4] is flagged to logic 1.
The Xon and Xoff word length is programmable between 5
and 8 bits depending on LCR[1:0] with the LSB bit mapped
to bit 0. The same word length is used for special character
comparison.
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