NS16C2552 Datasheet, PDF (19/43 Pages) National Semiconductor (TI) – Dual UART with 16-byte/64-byte FIFOs and up to 5 Mbit/s Data Rate

6.0 Register Set (Continued)
TABLE 11. MCR (0x4) (Continued)
R/W
Bit
Bit Name
Def
Description
4
Internal
R/W Internal Loopback Enable
Loopback
Ena
0
This bit provides a local loopback feature for diagnostic testing of the associated serial
channel. (Refer to Section 7.8 INTERNAL LOOPBACK MODE and Figure 13.)
1 = the transmitter Serial Output (SOUT) is set to the Marking (logic 1) state; the
receiver Serial Input (SIN) is disconnected; the output of the Transmitter Shift Register is
looped back into the Receiver Shift Register input; the four MODEM Control inputs
(DSR, CTS, RI, and DCD) are disconnected; the four MODEM Control outputs (DTR,
RTS, OUT1 and OUT2) are internally connected to the four MODEM Control inputs; and
the MODEM Control output pins are forced to their inactive state (high). In this
diagnostic mode, data that is transmitted is immediately received. This feature allows the
processor to verify transmit and receive data paths of the DUART. In this diagnostic
mode, the receiver and transmitter interrupts are fully operational. Their sources are
external to the part. The MODEM Control Interrupts are also operational, but the
interrupt sources are now the lower four bits of the MODEM Control Register instead of
the four MODEM Control inputs. The interrupts are still controlled by the Interrupt Ena
0 = Normal Tx/Rx operation; loopback disabled (default).
3
OUT2
R/W Output2
0
This bit controls the Output 2 (OUT2) signal, which is an auxiliary user-designated
output. Bit 3 affects the OUT2 pin as described below. The function of this bit is
multiplexed on a single output pin with two other functions: BAUDOUT and RXDRY. The
OUT2 function is the default function of the pin after a master reset. See Section 6.12
ALTERNATE FUNCTION REGISTER (AFR) for more information about selecting one of
these 3 pin functions.
1 = Force OUT2 to logic 0.
0 = Force OUT2 to logic 1 (default).
2
OUT1
R/W Output1
0
In normal operation, OUT1 bit is not available as an output.
In internal Loopback Mode (MCR 0x4.4=1) this bit controls the state of the modem input
RI in the MSR bit 6.
1 = MSR 0x06.6 is at logic 1.
0 = MSR 0x06.6 is at logic 0.
1
RTS
R/W RTS Output Control
Output
0
This bit controls the RTS pin. If modem interface is not used, this output is used as a
general purpose output.
1 = Force RTS pin to logic 0.
0 = Force RTS pin to logic 1(default).
0
DTR
R/W DTR Output Control
Output
0
This bit controls the DTR pin. If modem interface is not used, this output is used as a
general purpose output.
1 = Force DTR pin to logic 0.
0 = Force DTR pin to logic 1(default).
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