NS16C2552 Datasheet, PDF (26/43 Pages) National Semiconductor (TI) – Dual UART with 16-byte/64-byte FIFOs and up to 5 Mbit/s Data Rate

6.0 Register Set (Continued)
TABLE 20. EFR (0x2, LCR = 0xBF) (Continued)
Bit Name R/W
Bit
Default
Def
Description
3:0
Software
R/W Software Flow Control Select
Flow
Control
Sel
0
Single character and dual sequential character software flow control is supported.
Combinations of software flow control can be selected by programming the bits.
EFR[3] EFR[2]
1
1
1
0
0
1
0
0
X
X
X
X
X
X
0
0
EFR[1]
1
1
1
1
1
0
0
0
EFR[0]
1
1
1
1
0
1
0
0
Rx Flow Control
Rx compares Xon1 & Xon2, Xoff1 & Xoff2
Rx compares Xon1 or Xon2, Xoff1 or Xoff2
Rx compares Xon1 or Xon2, Xoff1 or Xoff2
Rx compares Xon1 & Xon2, Xoff1 & Xoff2
Rx compares Xon1, Xoff1
Rx compares Xon2, Xoff2
No Rx flow control
No Tx & Rx flow control (default)
EFR[3]
1
1
0
0
EFR[2]
1
0
1
0
EFR[1]
X
X
X
X
EFR[0]
X
X
X
X
Tx Flow Control
Tx Xon1 and Xon2, Xoff1 and Xoff2
Tx Xon1, Xoff1
Tx Xon2, Xoff2
No Tx flow control
6.15 SOFTWARE FLOW CONTROL REGISTERS (SFR)
The following four registers are used as programmable soft-
ware flow control characters.
TABLE 21. Xon1 (0x4, LCR=0xBF)
R/W
Bit
Bit Name
Def
R/W
7:0
Xon1 Data
Xon1 Data
0
Description
TABLE 22. Xon2 (0x5, LCR=0xBF)
R/W
Bit
Bit Name
Def
R/W
7:0
Xon2 Data
Xon2 Data
0
Description
TABLE 23. Xoff1 (0x6, LCR=0xBF)
R/W
Bit
Bit Name
Def
R/W
7:0
Xoff1 Data
Xoff1 Data
0
Description
TABLE 24. Xoff2 (0x7, LCR=0xBF)
R/W
Bit
Bit Name
Def
R/W
7:0
Xoff2 Data
Xoff2 Data
0
Description
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