NT5DS4M32EG Datasheet, PDF (18/46 Pages) NanoAmp Solutions, Inc. – 1M × 32 Bits × 4 Banks Double Data Rate Synchronous RAM With Bi-Directional Data Strobe and DLL

NanoAmp Solutions, Inc.
PRECHARGE COMMAND
NT5DS4M32EG
Advance Information
The precharge command is issued when /CS, /RAS, and /WE are low and /CAS is high at the rising edge of the clock,
CK. The precharge command can be used to precharge each bank respectively or all banks simultaneously. The Bank
select addresses(BA0, BA1) are used to define which bank is precharged when the command is initiated. For write
cycle, tWR (min). must be satisfied from the start of the last burst write cycle until the precharge command can be
issued. After tRP from the precharge, an active command to the same bank can be initiated.
Table 4: Bank Selection for Precharge by Bank Address Bits
A8/AP
0
0
0
0
1
BA1
0
0
1
1
X
BA0
0
1
0
1
X
Precharge
Bank A Only
Bank B Only
Bank C Only
Bank D Only
All Banks
AUTO REFRESH
An Auto Refresh command is issued by having /CS, /RAS and /CAS held low with CKE and /WE high at the rising
edge of the clock, CK. All banks must be precharged and idle for a tRP (min) before the Auto Refresh command is
applied. The refresh addressing is generated by the internal refresh address counter. This makes the address bits
“Don’t care” during an Auto Refresh command. When the refresh cycle has completed, all banks will be in the idle
state. A delay between the Auto Refresh command and the next Activate Command or subsequent Auto Refresh
Command must be greater than or equal to the tRFC (min).
Figure 20: Auto Refresh
0
1
2
3
4
5
6
7
8
9
10
11
/CK
CK
Command
PRE
Auto
Refresh
CMD
All Banks
CKE=High
tRP
tRFC
Doc # 14-02-045 Rev A ECN 01-1118
18
The specifications of this device are subject to change without notice. For latest documentation see http://www.nanoamp.com.