MC68HC705P6A Datasheet, PDF (93/130 Pages) Motorola, Inc – HCMOS Microcontroller Unit

Mask Option Register (MOR)
Mask Option Register
SPR0 and SPR1 — SIOP Clock Rate
The SPR0 and SPR1 bits determine the clock rate used to transfer the
serial data to and from the SIOP. The various clock rates available are
given in Table 11-1.
Table 11-1. SIOP Clock Rate
SPR1
0
0
1
1
SPR0
0
1
0
1
SIOP Master Clock
f_osc ÷ 64
f_osc ÷ 32
f_osc ÷ 16
f_osc ÷ 8
SWAIT — STOP Instruction Mode
Setting the SWAIT bit will prevent the STOP instruction from stopping
the on-board oscillator. Clearing the SWAIT bit will permit the STOP
instruction to stop the on-board oscillator and place the MCU in stop
mode. Executing the STOP instruction when SWAIT is set will place
the MCU in halt mode. See 3.5.1 STOP Instruction for additional
information.
SECURE — Security State⁽¹⁾
If SECURE bit is set, the EPROM is locked.
PA(0:7)PU — Port A Pullups/Interrupt Enable/Disable
If any PA(0:7)PU is selected, that pullup/interrupt is enabled. The
interrupt sensitivity will be selected via the LEVEL bit in the same way
as the IRQ pin.
NOTE: The port A pullup/interrupt function is NOT available on the ROM device,
MC68HC05P6.
1. No security feature is absolutely secure. However, Motorola’s strategy is to make reading or
copying the EPROM/OTPROM difficult for unauthorized users.
MC68HC705P6A — Rev. 2.0
MOTOROLA
Mask Option Register (MOR)
Advance Information
93