MC68HC705P6A Datasheet, PDF (37/130 Pages) Motorola, Inc – HCMOS Microcontroller Unit

Operating Modes
Bootloader Mode
3.4 Bootloader Mode
The bootloader mode provides a means to program the user EPROM
from an external memory device or host computer. This mode is entered
on the rising edge of RESET if V_PP is applied to the IRQ/V_PP pin and V_DD
is applied to the PD7/TCAP pin. The user code in the external memory
device must have data located in the same address space it will occupy
in the internal MCU EPROM, including the mask option register (MOR)
at $1EFF and $1F00.
3.5 Low-Power Modes
The MC68HC705P6A is capable of running in a low-power mode in each
of its configurations. The WAIT and STOP instructions provide three
modes that reduce the power required for the MCU by stopping various
internal clocks and/or the on-chip oscillator. The SWAIT bit in the MOR
is used to modify the behavior of the STOP instruction from stop mode
to halt mode. The flow of the stop, halt, and wait modes is shown in
Figure 3-2.
3.5.1 STOP Instruction
The STOP instruction can result in one of two modes of operation
depending on the state of the SWAIT bit in the MOR. If the SWAIT bit is
clear, the STOP instruction will behave like a normal STOP instruction in
the M68HC05 Family and place the MCU in stop mode. If the SWAIT bit
in the MOR is set, the STOP instruction will behave like a WAIT
instruction (with the exception of a brief delay at startup) and place the
MCU in halt mode.
3.5.1.1 Stop Mode
Execution of the STOP instruction when the SWAIT bit in the MOR is
clear places the MCU in its lowest power consumption mode. In stop
mode, the internal oscillator is turned off, halting all internal processing,
including the COP watchdog timer. Execution of the STOP instruction
automatically clears the I bit in the condition code register so that the IRQ
external interrupt is enabled. All other registers and memory remain
unaltered. All input/output lines remain unchanged.
MC68HC705P6A — Rev. 2.0
MOTOROLA
Operating Modes
Advance Information
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