MC68HC705P6A Datasheet, PDF (79/130 Pages) Motorola, Inc – HCMOS Microcontroller Unit

Analog Subsystem
Digital Section
9.5 Digital Section
The following paragraphs describe the operation and performance of
digital modules within the analog subsystem.
9.5.1 Conversion Times
Each input conversion requires 32 internal clock cycles, which must be
at a frequency equal to or greater than 1 MHz.
9.5.2 Internal versus External Oscillator
If the internal clock is 1 MHz or greater (i.e., external oscillator 2 MHz or
greater), the internal RC oscillator must be turned off and the external
oscillator used as the conversion clock.
If the MCU internal clock frequency is less than 1 MHz (2 MHz external
oscillator), the internal RC oscillator (approximately 1.5 MHz) must be
used for the A/D converter clock. The internal RC clock is selected by
setting the ADRC bit in the ADSC register.
When the internal RC oscillator is being used, these limitations apply:
1. Since the internal RC oscillator is running asynchronously with
respect to the internal clock, the conversion complete bit (CC) in
register ADSC must be used to determine when a conversion
sequence has been completed.
2. Electrical noise will slightly degrade the accuracy of the A/D
converter. The A/D converter is synchronized to read voltages
during the quiet period of the clock driving it. Since the internal and
external clocks are not synchronized, the A/D converter will
occasionally measure an input when the external clock is making
a transition.
MC68HC705P6A — Rev. 2.0
MOTOROLA
Analog Subsystem
Advance Information
79