MC68HC705P6A Datasheet, PDF (43/130 Pages) Motorola, Inc – HCMOS Microcontroller Unit

Resets
Internal Resets
voltage range (between V_SS–V_DD), the COP watchdog timer’s output will
be restored if the COP bit in the mask option register (MOR) is set.
The COP register is shared with the least significant byte (LSB) of an
unused vector address as shown in Figure 4-2. Reading this location will
return the programmed value of the unused user interrupt vector,
usually 0. Writing to this location will clear the COP watchdog timer.
Address: $1FF0
Bit 7
6
5
4
3
2
1
Bit 0
Read: 0
0
0
0
0
0
0
0
Write:
COPR
= Unimplemented
Figure 4-2. Unused Vector and COP Watchdog Timer
When the COP watchdog timer expires, it will generate the RST signal
and reset the MCU. If any other reset function is active at the end of the
COP reset signal, the RST signal will remain in the reset condition until
the other reset condition(s) end. When the reset condition ends, the
MCU’s operating mode will be selected (see Table 3-1).
MC68HC705P6A — Rev. 2.0
MOTOROLA
Resets
Advance Information
43