MC68HC705P6A Datasheet, PDF (109/130 Pages) Motorola, Inc – HCMOS Microcontroller Unit

Instruction Set
Instruction Types
13.4.4 Bit Manipulation Instructions
The CPU can set or clear any writable bit in the first 256 bytes of
memory, which includes I/O registers and on-chip RAM locations. The
CPU can also test and branch based on the state of any bit in any of the
first 256 memory locations.
Table 13-4. Bit Manipulation Instructions
Instruction
Bit Clear
Branch if Bit Clear
Branch if Bit Set
Bit Set
Mnemonic
BCLR
BRCLR
BRSET
BSET
13.4.5 Control Instructions
These instructions act on CPU registers and control CPU operation
during program execution.
Table 13-5. Control Instructions
Instruction
Mnemonic
Clear Carry Bit
CLC
Clear Interrupt Mask
CLI
No Operation
NOP
Reset Stack Pointer
RSP
Return from Interrupt
RTI
Return from Subroutine
RTS
Set Carry Bit
SEC
Set Interrupt Mask
SEI
Stop Oscillator and Enable IRQ Pin
STOP
Software Interrupt
SWI
Transfer Accumulator to Index Register
TAX
Transfer Index Register to Accumulator
TXA
Stop CPU Clock and Enable Interrupts
WAIT
MC68HC705P6A — Rev. 2.0
MOTOROLA
Instruction Set
Advance Information
109